Circuit arrangement for a data processing system and method for data processing

Patent metadata

Field	Value
Publication number	US-9367516-B2
Application number	US-201113638125-A
Country	US
Kind code	B2
Filing date	Mar 18, 2011
Priority date	Mar 31, 2010
Publication date	Jun 14, 2016
Grant date	Jun 14, 2016

Abstract

A circuit arrangement for a data processing system is configured to process data in multiple modules. The circuit arrangement is configured to provide a clock as well as a time base and/or a base of at least one further physical quantity for each of the multiple modules. The circuit arrangement also comprises a central routing unit, which is connected to several of the multiple modules. Via the central routing unit, the modules can periodically exchange data based on the time base and/or on the base of the at least one further physical quantity. The several modules are configured to process data independently of and in parallel to other modules of the several modules.

First claim

The invention claimed is:

1. A circuit arrangement for a data processing system comprising:
a plurality of modules configured to process data independently and in parallel with other modules of the plurality of modules, the data having a time base and a base given by a first physical variable, the plurality of modules at least including:
at least one input module configured to receive input signals and to generate the data by combining the input signals with the time base and the base given by the first physical variable;
at least one processing module configured to receive the data and to perform an operation on the data; and
at least one output module configured to receive processed signals and to output the processed signals;

a phase locked loop configured to (i) determine a time interval until a next expected sensor value from a sequence of sequential sensor values, the sensor values being received from a sensor that measures the first physical variable, and (ii) distribute a defined number of pulses over the time interval;
a time-base unit having a time-based counter and a position-based counter, the time-base unit being configured to (i) provide the time base, (ii) count the pulses from the phase locked loop, (iii) estimate values for the first physical variable at the pulses, and (iv) provide the estimated values for the first physical variable as the base given by the first physical variable; and
a central routing unit connected to the plurality of modules, the central routing unit being configured to route the data cyclically between each module of the plurality of modules.

2. The circuit arrangement according to claim 1 , further comprising:
a clock management unit configured to provide configurable clocks to the plurality of modules.

3. The circuit arrangement according to claim 1 , wherein at least some of the plurality of modules are configurable during a running time of the circuit arrangement.

4. The circuit arrangement according to claim 1 , wherein the central routing unit is configured to provide, when routing data, data of a data source to a plurality of data sinks in at least one of the several modules.

5. The circuit arrangement according to claim 4 , wherein the central routing unit is configured to sequentially select a number of data knots in a configurable order and to process sending or reading requests of each data knot of the number of data knots when selected.

6. A method for processing data in multiple modules of a circuit arrangement comprising:
providing a clock and at least one of a time base and a base of at least one further physical quantity for each module of the multiple modules, the multiple modules at least including an input module, an output module, and a processing module, the processing module being configured to process input data received from the input module and to calculate output sequences based on values of the at least one of the time base and the base of the at least one further physical quantity, the output sequences being processed in combination with the output module;
periodically exchanging data based on the at least one of the time base and the base of the at least one further physical quantity between a number of modules via a central routing unit;
processing data independently and in parallel to other modules of the multiple modules with several of the multiple modules;
determining from a series of consecutive input signal values a time interval after which a next input signal value of the at least one input signal is expected;
distributing a given number of impulses on the time interval;
determining, when counting the impulses, values of the first physical quantity; and providing the values as the base of the first physical quantity.

Assignees

• Boehl Eberhard
• Bartholomae Ruben
• Knauss Matthias
• Schmitt Stephen
• Wagner Thomas
• Hempel Andreas
• Thoss Dieter
• Mader Bernhard
• Schaefer Achim
• Hanisch Juergen
• Scheurer Uwe
• Merker Andreas
• Kurrer Rolf
• Becker Bernd
• Pawlok Bernard
• Bosch Gmbh Robert

Inventors

• Boehl Eberhard
• Bartholomae Ruben
• Knauss Matthias
• Schmitt Stephen
• Wagner Thomas
• Hempel Andreas
• Thoss Dieter
• Mader Bernhard
• Schaefer Achim
• Hanisch Juergen
• Scheurer Uwe
• Merker Andreas
• Kurrer Rolf
• Becker Bernd
• Pawlok Bernard

Classifications

• G06F15/76 Primary

  Architectures of general purpose stored program computers (with program plugboard G06F15/08; multicomputers G06F15/16) · CPC title

• G06F1/04 Primary

  Generating or distributing clock signals or signals derived directly therefrom · CPC title