Semiconductor device and method for fabricating the same

Patent metadata

Field	Value
Publication number	US-9362422-B2
Application number	US-201414459455-A
Country	US
Kind code	B2
Filing date	Aug 14, 2014
Priority date	Dec 12, 2013
Publication date	Jun 7, 2016
Grant date	Jun 7, 2016

Abstract

Provided is a semiconductor device and a method for fabricating the same. The semiconductor device includes an interlayer insulating layer formed on a semiconductor substrate, a metal contact plug penetrating the interlayer insulating layer, a cylindrical lower electrode formed on the metal contact plug and including a first metal and a trench, a supporter formed in the trench and including a second metal that is different from the first metal, a dielectric layer formed on the lower electrode and the supporter and an upper electrode formed on the dielectric layer.

First claim

What is claimed is:

1. A semiconductor device comprising:
an interlayer insulating layer on a semiconductor substrate;
a metal contact plug in at least a portion of the interlayer insulating layer;
a cylindrical lower electrode on the metal contact plug and including a first metal and a trench;
a supporter in the trench and including a second metal that is different from the first metal;
a dielectric layer on the lower electrode and directly on the supporter; and
an upper electrode on the dielectric layer;
wherein the second metal has an ultimate tensile strength (UTS) that is higher than a UTS of the first metal.

2. The semiconductor device of claim 1 , wherein the trench is substantially entirely filled by the supporter.

3. The semiconductor device of claim 1 , wherein
the first metal includes TiN; and
the second metal includes carbon nanotube or graphene.

4. The semiconductor device of claim 1 , wherein the trench comprises a void.

5. The semiconductor device of claim 1 , wherein the semiconductor substrate includes a first region and a second region,
the metal contact plug includes a first metal contact plug in the first region and a second metal contact plug in the second region,
the lower electrode includes a first lower electrode on the first metal contact plug and having a first trench, and a second lower electrode on the second metal contact plug and having a second trench, and
the supporter includes a first supporter substantially completely filling the first trench and a second supporter at least partially filling the second trench.

6. The semiconductor device of claim 5 , wherein the second trench comprises a void.

7. The semiconductor device of claim 1 , wherein an upper surface of the first lower electrode and an upper surface of the supporter are substantially coplanar.

8. The semiconductor device of claim 1 , further comprising a transistor and a bit line electrically connected to the metal contact plug under the interlayer insulating layer.

9. The semiconductor device of claim 8 , wherein the transistor includes a BCAT (Buried Channel Array Transistor).

10. A semiconductor device comprising:
an interlayer insulating layer on a semiconductor substrate;
a metal contact plug in at least a portion of the interlayer insulating layer;
a cylindrical lower electrode on the metal contact plug and including a first conductive material and a trench;
a supporter in the trench and including a second conductive material that is different from the first conductive material;
a dielectric layer on the lower electrode and directly on the supporter; and
an upper electrode on the dielectric layer,
wherein a first value of the first conductive material, obtained by dividing a shear modulus by an elastic bulk modulus, is equal to or larger than 0.57, and
a second value of the second conductive material, obtained by dividing the shear modulus by the elastic bulk modulus, is equal to or smaller than 0.57, and
wherein the second conductive material includes Ti 0.5 W 0.5 N or Ti 0.5 Mo 0.5 N.

11. The semiconductor device of claim 10 , wherein at least one of the first conductive material and the second conductive material include metal nitride.

12. The semiconductor device of claim 11 , wherein the first conductive material includes TiN.

13. A semiconductor device comprising:
an interlayer insulating layer on a semiconductor substrate;
a metal contact plug in at least a portion of the interlayer insulating layer;
a lower electrode on the metal contact plug, the lower electrode including a trench;
a supporter in the trench, the supporter being more ductile than the lower electrode; and
a dielectric layer on the lower electrode and directly on the supporter,
wherein the trench is substantially entirely filled by the supporter.

14. The semiconductor device of claim 13 , further comprising an upper electrode on the dielectric layer.

15. The semiconductor of claim 14 , wherein the lower electrode and the upper electrode form a capacitor.

16. The semiconductor device of claim 13 , wherein:
a first value obtained by dividing a shear modulus of the lower electrode by an elastic bulk modulus of the lower electrode is in a brittle range, and
a second value obtained by dividing a shear modulus of the supporter by an elastic bulk modulus of the supporter is in a ductile range.

17. The semiconductor device of claim 13 , wherein the lower electrode is more brittle than the supporter.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Lim Han-Jin

Classifications

• H10B12/34

  the transistor being at least partially in a trench in the substrate · CPC title

• H10B12/318

  the storage electrode having multiple segments · CPC title

• H10B12/315

  with the capacitor higher than a bit line · CPC title

• H10B12/0335

  Making a connection between the transistor and the capacitor, e.g. plug · CPC title

• H10D1/042 Primary

  using deposition processes to form electrode extensions · CPC title