Methods of fabricating BEOL interlayer structures

Patent metadata

Field	Value
Publication number	US-9362162-B2
Application number	US-201414459444-A
Country	US
Kind code	B2
Filing date	Aug 14, 2014
Priority date	Aug 14, 2014
Publication date	Jun 7, 2016
Grant date	Jun 7, 2016

Abstract

Methods are provided for fabricating an interlayer structure useful in, for instance, providing BEOL interconnect for circuit structures. The method includes, for instance, providing an interlayer structure, including: providing an uncured insulating layer above a substrate structure; forming an energy removal film over the uncured insulated layer; forming at least one opening through the energy removal film and extending at least partially into the uncured insulating layer; and applying energy to cure the uncured insulating layer, establishing a cured insulating layer, and decomposing in part the energy removal film, establishing a reduced thickness, energy removal film over the cured insulating layer, the interlayer structure including the cured insulating layer, and the applying energy decreasing an aspect ratio(s) of the one opening(s). In one implementation, the uncured insulating layer includes porogens which also decompose partially during applying energy to further improve the aspect ratio(s).

First claim

What is claimed is:

1. A method comprising:
providing an interlayer structure comprising:
providing an uncured insulating layer above a substrate structure;
forming an energy removal film over the uncured insulating layer;
forming at least one opening through the energy removal film and extending at least partially into the uncured insulating layer; and
applying energy to cure the uncured insulating layer and form a cured insulating layer, and to decompose in part the energy removal film and form a reduced thickness energy removal film over the cured insulating layer so as to decrease an aspect ratio of the at least one opening, wherein the interlayer structure comprises the cured insulating layer.

2. The method of claim 1 , wherein providing the interlayer structure further comprises, after applying the energy, over filling the at least one opening with a conductive material.

3. The method of claim 2 , wherein providing the interlayer structure further comprises planarizing an exposed surface of the interlayer structure after the over filling of the at least one opening with the conductive material.

4. The method of claim 3 , wherein providing the interlayer structure further comprises using the reduced thickness energy removal film as an etch stop for the planarizing.

5. The method of claim 4 , wherein the reduced thickness energy removal film is 10 nanometers or less in thickness and is removed by the planarizing of the exposed surface of the interlayer structure.

6. The method of claim 1 , wherein providing the interlayer structure further comprises providing a conductive material within the at least one opening to form a conductive structure, and the substrate structure comprises a metal layer disposed above a substrate of the substrate structure, the conductive structure extending, at least in part, to the metal layer.

7. The method of claim 6 , further comprising disposing another metal layer over the interlayer structure, wherein the conductive structure facilitates electrical connection between the metal layer and the another metal layer.

8. The method of claim 7 , wherein the substrate structure further comprises a device layer disposed below the metal layer, and wherein the conductive structure facilitates electrical connection between the another metal layer and the device layer.

9. The method of claim 1 , wherein the uncured insulating layer comprises one of a low-k dielectric material or an ultra-low-k dielectric material with porogens.

10. The method of claim 9 , wherein the cured insulating layer has an effective dielectric constant of 2.5 or less.

11. The method of claim 9 , wherein the uncured insulating layer comprises a porogen and matrix material, and wherein porogens of the uncured insulating layer decompose, at least partially, during the applying energy.

12. The method of claim 11 , wherein the porogens of the uncured insulating layer comprise a C-based polymer material, and the matrix material comprises an Si-based material.

13. The method of claim 9 , wherein the cured insulating layer has a reduced thickness compared with a thickness of the uncured insulating layer, further decreasing the aspect ratio(s) of the at least one opening.

14. The method of claim 12 , wherein the energy removal film decomposes to a greater degree than the uncured insulating film during the applying energy.

15. The method of claim 1 , wherein the cured insulating layer has a reduced thickness compared with a thickness of the uncured insulating layer, further decreasing the aspect ratio(s) of the at least one opening.

16. The method of claim 15 , wherein the applying energy reduces thickness of the energy removal film a greater percentage than the applying energy reduces thickness of the uncured insulating layer.

17. The method of claim 1 , wherein the applying energy results in the reduced energy removal film having a reduced thickness that is less than 50% a thickness of the energy removal film prior to the applying energy.

18. The method of claim 1 , wherein the energy removal film comprises a C-based polymer material.

19. The method of claim 1 , wherein the forming the energy removal film comprises forming the energy removal film from at least one of a photonic decomposable material, a thermal decomposable material, an e-beam decomposable material, or a combination thereof.

20. The method of claim 1 , wherein the applying energy comprises utilizing one or more of thermal energy, x-ray energy, ultraviolet light energy or infrared light energy.

Assignees

• Globalfoundries Inc

Inventors

• Singh Sunil Kumar
• Srivastava Ravi Prakash
• Tang Teck Jung
• Zaleski Mark Alexander

Classifications

• H10P95/00

  Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass · CPC title

• H10P50/73

  using masks for insulating materials · CPC title

• H10W20/084

  for dual-damascene structures · CPC title

• H10W20/095

  by irradiating with electromagnetic or particle radiation (plasma treatment H10W20/096) · CPC title

• H10W20/072

  of dielectric parts comprising air gaps · CPC title