Method for treatment of a temporarily bonded product wafer

Patent metadata

Field	Value
Publication number	US-9362154-B2
Application number	US-201013575316-A
Country	US
Kind code	B2
Filing date	Nov 23, 2010
Priority date	Feb 5, 2010
Publication date	Jun 7, 2016
Grant date	Jun 7, 2016

Abstract

A method for treatment of a product wafer temporarily bonded on a carrier wafer with the following steps: grinding and/or backthinning of the product wafer on one flat side facing away from the carrier wafer to a product wafer thickness D of <150 μm, especially <100 μm, preferably <75 μm, even more preferably <50 μm, especially preferably <30 μm, surface treatment of the flat side with means for reducing an especially structural intrinsic stress of the product wafer.

First claim

Having described the invention, the following is claimed:

1. Method for treatment of a product wafer temporarily bonded on a rigid carrier wafer with the following steps:
providing a rigid carrier wafer having a surface and an adhesive disposed on said surface;
fixing a processed side of the product wafer to the adhesive disposed on the surface of the rigid carrier wafer,
grinding and/or backthinning of the product wafer on one flat side facing away from the surface of the rigid carrier wafer to a product wafer thickness D of <150 μm, and
surface treating the flat side with means for reducing a structural intrinsic stress of the product wafer, the means setting the intrinsic stress of the product wafer to cause the product wafer to arch toward the rigid carrier wafer during a following thermal process.

2. Method as claimed in claim 1 , wherein the step of surface treatment takes place at a location that is separated in space from the location of the step of backthinning.

3. Method as claimed in claim 1 , wherein the means for reducing the intrinsic stress are characterized by at least one of the following features:
dry polishing of the flat side,
wet etching of the flat side, and
dry etching of the flat side.

4. Method as claimed in claim 1 , wherein the rigid carrier wafer has a coefficient of expansion which is identical to the coefficient of expansion of the product wafer.

5. Method as claimed in claim 1 , wherein the product wafer thickness D is less than 30 μm.

6. Method as claimed in claim 1 , wherein after surface treatment a thermal process step follows at a temperature greater than 100° C.

7. Method as claimed in claim 1 , wherein the rigid carrier wafer includes one or more of the following materials: silicon, glass or ceramic.

8. Method as claimed in claim 1 , wherein the product wafer with its contact side which is opposite the flat side is temporarily connected to the rigid carrier wafer using a thermoplastic adhesive.

9. Method as claimed in claim 8 , wherein the contact side of the product wafer has topographies which are embedded into the adhesive.

10. Method as claimed in claim 1 , wherein after surface treatment a thermal process step follows at temperatures >50° C.

11. Method as claimed in claim 10 , wherein the thermal process step is a chemical gas phase deposition process.

12. Method as claimed in claim 1 , wherein the means for reducing the intrinsic stress includes removing at least partially a defined layer thickness S of a crystal structure of the flat side which has been damaged by grinding and/or backthinning.

13. Method as claimed in claim 12 , wherein the layer thickness is S<10 μm.

14. Method as claimed in claim 12 , wherein the layer thickness S is less than 1 μm.

15. Method as claimed in claim 12 , wherein the layer thickness S is less than 0.5 μm.

Assignees

• Burggraf Jürgen
• Wiesbauer Harald
• Wimplinger Markus
• Ev Group E Thallner Gmbh

Inventors

• Burggraf Jürgen
• Wiesbauer Harald
• Wimplinger Markus

Classifications

• H10P72/7422

  used to protect an active side of a device or wafer · CPC title

• H10P72/7416

  used during dicing or grinding · CPC title

• H10P72/7402

  Wafer tapes, e.g. grinding or dicing support tapes · CPC title

• H10P72/74 Primary

  using temporarily an auxiliary support · CPC title

• H01L21/6836

  Electricity · mapped topic