Implementing reduced drill smear

Patent metadata

Field	Value
Publication number	US-9358618-B2
Application number	US-201313953045-A
Country	US
Kind code	B2
Filing date	Jul 29, 2013
Priority date	Jul 29, 2013
Publication date	Jun 7, 2016
Grant date	Jun 7, 2016

Abstract

A method is provided for implementing reduction of drill smear in drilling a multilayer substrate such as a rigid printed circuit board or flex to minimize or eliminate the need to remove drill smear and for improved via and interconnect reliability. An inert liquid is applied to the multilayer substrate and a drill bit prior to and during the drill process to cool and lubricate the multilayer substrate and the drill bit to reduce drill smear.

First claim

What is claimed is:

1. A method for reducing drill smear, the method comprising:
providing a multilayer substrate including dielectric materials configured to provide signal integrity performance; and
applying an inert liquid to the multilayer substrate and a drill bit prior to and while drilling the multilayer substrate to cool and lubricate the multilayer substrate and the drill bit,
wherein cooling the multilayer substrate and the drill bit reduces drill smear within the multilayer substrate, and the inert liquid is a fluorocarbon polymer of polyhexafluoropropylene oxide having a chemical formula of:

F—(CF(CF 3 )—CF 2 —O)n-CF 2 CF 3 , with n in a range of 10 to 60.

2. The method of claim 1 wherein the multilayer substrate is one of a rigid printed circuit board and a flex circuit board.

3. The method of claim 1 wherein applying an inert liquid to the multilayer substrate and a drill bit eliminates the need to remove drill smear.

4. The method of claim 1 wherein applying the inert liquid to the multilayer substrate and a drill bit results in improved via and interconnect reliability of the multilayer substrate.

5. The method of claim 1 wherein the inert liquid includes a temperature operating ranges from −75° C. to 350° C.

6. The method of claim 1 wherein the inert liquid is compatible with one or more of: a specific metal, an elastomer and polytetrafluoroethylene (PTFE).

7. The method of claim 1 comprising removing the inert liquid after drilling the multilayer substrate.

8. A method for reducing drill smear in a printed circuit board, the method comprising:
providing a multilayer substrate including polytetrafluoroethylene (PFTE)-based dielectric materials; and
applying an inert liquid to the multilayer substrate and a drill bit prior to and during drilling the multilayer substrate to cool and lubricate the multilayer substrate and the drill bit, wherein cooling the multilayer substrate and the drill bit reduces the drill smear within the multilayer substrate,
wherein the inert liquid is a fluorocarbon polymer of polyhexafluoropropylene oxide having a chemical formula of: F—(CF(CF 3 )—CF 2 —O)n-CF 2 CF 3 , with n in a range of 10 to 60.

9. The method of claim 7 wherein applying the inert liquid to the multilayer substrate and the drill bit results in improved via and interconnect reliability of the multilayer substrate.

10. The method of claim 8 comprising removing the inert liquid after the drill process.

11. The method of claim 7 wherein the inert liquid is compatible with one or more of a specific metal, an elastomer and polytetrafluoroethylene PTFE.

12. The method of claim 1 wherein the inert liquid provides top side cooling to the multilayer substrate.

13. The method of claim 7 wherein the inert liquid provides top side cooling to the multilayer substrate.

14. The method of claim 1 including providing polytetrafluoroethylene (PTFE) based dielectric materials for the multilayer substrate.

15. The method of claim 1 wherein the multilayer substrate is a lubricant having a temperature operating range that optimizes a substrate temperature for one or more of: a specific cross section, a drill stack-up, a hole size, drill equipment, drill feed rate, drill speed rate and drill pattern.

16. The method of claim 8 wherein the multilayer substrate is a lubricant having a temperature operating range that optimizes a substrate temperature for one or more of: a specific cross section, a drill stack-up, a hole size, drill equipment, drill feed rate, drill speed rate and drill pattern.

Assignees

• Globalfoundries Inc

Inventors

• Carlson Brian L
• Dangler John R
• Kuczynski Joseph
• Taylor Jeffrey A

Classifications

• H05K1/034

  containing halogen · CPC title

• H05K2203/0207

  Partly drilling through substrate until a controlled depth, e.g. with end-point detection · CPC title

• H05K2203/127

  Lubricants, e.g. during drilling of holes · CPC title

• B23B35/00 Primary

  Methods for boring or drilling, or for working essentially requiring the use of boring or drilling machines; Use of auxiliary equipment in connection with such methods · CPC title

• B23B2250/12

  Cooling and lubrication · CPC title