Wafer level lens in package

Patent metadata

Field	Value
Publication number	US-9354111-B2
Application number	US-201414277263-A
Country	US
Kind code	B2
Filing date	May 14, 2014
Priority date	Oct 18, 2013
Publication date	May 31, 2016
Grant date	May 31, 2016

Abstract

A wafer level optical device, system, and method are described that include a substrate, an electronic device disposed on the substrate, an illumination source disposed on the electronic device, an enclosure disposed on the substrate, where the enclosure includes at least one optical surface and covers the electronic device and the illumination source, and at least one solder ball disposed on a side of the substrate distal from the electronic device. In implementations, a process for using the wafer level optical device and lens-integrated package system that employ the techniques of the present disclosure includes receiving a substrate, placing an electronic device on the substrate, placing an illumination source on the electronic device, and placing an enclosure on the substrate, where the enclosure covers the electronic device and the illumination source, and the enclosure and a wall structure form a first compartment and a second compartment.

First claim

What is claimed is:

1. A wafer level optical device, comprising:
a substrate;
an electronic device disposed on the substrate, the electronic device comprising an integrated circuit chip;
an illumination source disposed on the electronic device;
an enclosure disposed on the substrate, the enclosure including at least one optical surface, where the enclosure covers the electronic device and the illumination source; and
at least one solder ball disposed on a side of the substrate distal from the electronic device.

2. The wafer level optical device as recited in claim 1 , wherein the substrate comprises a printed circuit board with routing.

3. The wafer level optical device as recited in claim 1 , wherein the enclosure includes at least one of a silicon window or a filter, where the at least one silicon window or filter allows between 1 μm and 10 μm wavelength light to pass through.

4. The wafer level optical device as recited in claim 1 , wherein the electronic device includes a sensor.

5. The wafer level optical device as recited in claim 4 , wherein the electronic device includes multiple sensors.

6. The wafer level optical device as recited in claim 1 , wherein the electronic device includes a digital processor.

7. The wafer level optical device as recited in claim 1 , wherein the illumination source includes a light-emitting diode.

8. The wafer level optical device as recited in claim 1 , wherein the illumination source includes a vertical-cavity surface-emitting laser.

9. The wafer level optical device as recited in claim 1 , wherein the illumination source includes a sensor disposed on the electronic device.

10. The wafer level optical device as recited in claim 1 , wherein the enclosure includes at least one lens.

11. The wafer level optical device as recited in claim 10 , wherein the at least one lens is aligned with an optically active portion of the electronic device.

12. A lens-integrated package system, comprising:
a printed circuit board; and
a wafer level optical device disposed on the printed circuit board, the wafer level optical device including
a substrate;
an electronic device disposed on the substrate, the electronic device comprising an integrated circuit chip;
an illumination source disposed on the electronic device;
an enclosure disposed on the substrate, the enclosure including at least two lenses and at least one optical surface, where the enclosure covers the electronic device and the illumination source; and
at least one solder ball disposed on a side of the substrate distal from the electronic device.

13. The lens-integrated package system as recited in claim 12 , wherein the illumination source includes a vertical-cavity surface-emitting laser.

14. The lens-integrated package system as recited in claim 12 , wherein the electronic device includes a sensor.

15. The lens-integrated package system as recited in claim 12 , wherein the illumination source includes a light-emitting diode.

16. A process, comprising:
receiving a substrate;
placing an electronic device on the substrate, the electronic device comprising an integrated circuit chip;
placing an illumination source on the electronic device; and
placing an enclosure on the substrate, where the enclosure covers the electronic device and the illumination source, and the enclosure and a wall structure form a first compartment and a second compartment.

17. The process as recited in claim 16 , wherein placing an enclosure on the substrate includes placing an enclosure that includes at least one lens.

18. The process as recited in claim 16 , wherein the first compartment houses a sensor portion of the electronic device and the second compartment houses the illumination source.

19. The process as recited in claim 16 , wherein placing the illumination source includes placing a light-emitting diode.

Assignees

• Maxim Integrated Products

Inventors

• Kerness Nicole D
• Samoilov Arkadii V
• Bhat Jerome C
• Chamakura Anand
• Nagarajan Kumar
• Edwards Christopher F

Classifications

• G01J1/08

  Arrangements of light sources specially adapted for photometry {standard sources, also using luminescent or radioactive material} · CPC title

• G01J1/4204

  with determination of ambient light (solar light G01J2001/4266) · CPC title

• G01J1/0411 Primary

  using focussing or collimating elements, i.e. lenses or mirrors; Aberration correction · CPC title

• G01J1/0271

  Housings; Attachments or accessories for photometers · CPC title