Stacked half-bridge package with a common leadframe

Patent metadata

Field	Value
Publication number	US-9349677-B2
Application number	US-201313866744-A
Country	US
Kind code	B2
Filing date	Apr 19, 2013
Priority date	Jan 14, 2011
Publication date	May 24, 2016
Grant date	May 24, 2016

Abstract

According to an exemplary embodiment, a stacked half-bridge package includes a control transistor having a control drain for connection to a high voltage input, a control source coupled to an output terminal, and a control gate for being driven by a driver IC. The stacked half-bridge package further includes a sync transistor having a sync drain for connection to the output terminal, a sync source coupled to a low voltage input, and a sync gate for being driven by the driver IC. The control and sync transistors are stacked on opposite sides of a common conductive leadframe with the common conductive leadframe electrically and mechanically coupling the control source with the sync drain. The common conductive leadframe thereby serves as the output terminal.

First claim

The invention claimed is:

1. A stacked half-bridge package comprising:
a control transistor having a control drain, a control source, and a control gate;
a sync transistor having a sync drain, a sync source, and a sync gate;
said control and sync transistors being stacked on opposite sides of a common leadframe, said common leadframe serving as an output terminal by coupling said control source with said sync drain.

2. The stacked half-bridge package of claim 1 , wherein said common leadframe comprises a web portion and a leg portion.

3. The stacked half-bridge package of claim 1 , wherein respective bottom surfaces of said sync transistor and a leg portion of said common leadframe are substantially flush with one another.

4. The stacked half-bridge package of claim 1 , wherein a conductive clip provides connection between said control drain and a control drain leadframe.

5. The stacked half-bridge package of claim 1 , comprising a conductive clip including a web portion that is coupled to said control drain and including a leg portion that is coupled to a control drain leadframe.

6. The stacked half-bridge package of claim 1 , wherein a conductive clip is coupled to said control drain at a topside of said stacked half-bridge package.

7. The stacked half-bridge package of claim 1 , wherein said sync source comprises a solderable front metal (SFM).

8. The stacked half-bridge package of claim 1 , wherein said sync source is exposed on a bottom surface of said sync transistor.

9. The stacked half-bridge package of claim 1 , wherein said sync gate is exposed on a bottom surface of said sync transistor.

10. The stacked half-bridge package of claim 1 , wherein said control transistor has top and bottom surfaces, said control drain being on said top surface and said control source and said control gate being on said bottom surface.

11. The stacked half-bridge package of claim 1 , wherein said sync transistor has top and bottom surfaces, said sync drain being on said top surface and said sync source and said sync gate being on said bottom surface.

12. A stacked half-bridge package comprising:
a control GaN HEMT having a control drain, a control source, and a control gate;
a sync GaN HEMT having a sync drain, a sync source, and a sync gate;
said control and sync GaN HEMTs being stacked on opposite sides of a common leadframe, said common leadframe serving as an output terminal by coupling said control source with said sync drain.

13. The stacked half-bridge package of claim 12 , wherein said common leadframe comprises a web portion and a leg portion.

14. The stacked half-bridge package of claim 12 , wherein respective bottom surfaces of said sync GaN HEMT and a leg portion of said common leadframe are substantially flush with one another.

15. The stacked half-bridge package of claim 12 , wherein a conductive clip provides connection between said control drain and a control drain leadframe.

16. The stacked half-bridge package of claim 12 , comprising a conductive clip including a web portion that is coupled to said control drain and including a leg portion that is coupled to a control drain leadframe.

17. The stacked half-bridge package of claim 12 , wherein a conductive clip is coupled to said control drain at a topside of said stacked half-bridge package.

18. The stacked half-bridge package of claim 12 , wherein said sync source comprises a solderable front metal (SFM).

19. The stacked half-bridge package of claim 12 , wherein said sync source is exposed on a bottom surface of said sync GaN HEMT.

20. The stacked half-bridge package of claim 12 , wherein said sync gate is exposed on a bottom surface of said sync GaN HEMT.

Assignees

• Int Rectifier Corp
• Infineon Technologies Americas Corp

Inventors

• Cho Eung San
• Cheah Chuan
• Sawle Andrew N

Classifications

• H10W90/766

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W90/736

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W74/111

  the semiconductor body being completely enclosed · CPC title

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title

• H10W72/07653

  changes in shapes · CPC title