Forming instruction groups based on decode time instruction optimization

Patent metadata

Field	Value
Publication number	US-9348596-B2
Application number	US-201313931698-A
Country	US
Kind code	B2
Filing date	Jun 28, 2013
Priority date	Jun 28, 2013
Publication date	May 24, 2016
Grant date	May 24, 2016

Abstract

Instructions are grouped into instruction groups based on optimizations that may be performed. An instruction is obtained, and a determination is made as to whether the instruction is to be included in a current instruction group or another instruction group. This determination is made based on whether the instruction is a candidate for optimization, such as decode time instruction optimization. If it is determined that the instruction is to be included in another group, then the other group is formed to include the instruction.

First claim

What is claimed is:

1. A computer program product for facilitating processing in a processing environment, said computer program product comprising:
a non-transitory computer readable storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method comprising:
obtaining an instruction to be executed in the processing environment;
determining whether the instruction is to be included in a current group of instructions or a new group of instructions, wherein the determining is based on whether the instruction is a candidate for optimization with another instruction according to an optimization criterion, and wherein the determining further comprises:
checking whether an instruction sequence to be optimized that includes at least the instruction and the other instruction fits in the current group of instructions, wherein the checking includes checking a marker associated with the instruction, the marker indicating a length of the instruction sequence; and
forming the new group of instructions based on determining the instruction is a candidate for optimization and the instruction sequence does not fit in the current group of instructions, wherein the new group of instructions includes the instruction and the other instruction; and

based on forming the new group of instructions, executing at least one instruction associated with the new group of instructions.

2. The computer program product of claim 1 , wherein the determining comprises determining whether the instruction represents a beginning of a potential optimization sequence that includes the instruction and the other instruction, and wherein the forming forms the new group of instructions based on the instruction representing the beginning of a potential optimization sequence.

3. The computer program product of claim 2 , wherein the determining whether the instruction represents the beginning of a potential optimization sequence comprises checking a selected marker associated with the instruction, the selected marker indicating whether the instruction starts a potential optimization sequence.

4. The computer program product of claim 3 , wherein the method further comprises marking the instruction with the selected marker, the selected marker indicating one of: the instruction is considered as representing the beginning of a potential optimization sequence, or the instruction is not considered as representing the beginning of a potential optimization sequence, and wherein the marking is performed at instruction fetch.

5. The computer program product of claim 1 , wherein the method further comprises:
determining a number of instructions in the instruction sequence; and
marking the instruction with a marker that indicates the number of instructions, the marking being performed at instruction fetch.

6. The computer program product of claim 1 , wherein the optimization criterion is specified in one or more templates, and wherein at least one template of the one or more templates is to be used to determine whether the instruction is a candidate for optimization.

7. The computer program product of claim 1 , wherein the optimization criterion optimizes the instruction and the other instruction by creating at least one internal operation that represents at least a portion of the instruction and at least a portion of the other instruction.

8. The computer program product of claim 1 , wherein the optimization is performed at decode time.

9. A computer system for facilitating processing in a processing environment, said computer system comprising:
a memory; and
a processor in communications with the memory, wherein the computer system is configured to perform a method, said method comprising:
obtaining an instruction to be executed in the processing environment;
determining whether the instruction is to be included in a current group of instructions or a new group of instructions, wherein the determining is based on whether the instruction is a candidate for optimization with another instruction according to an optimization criterion, and wherein the determining further comprises:
checking whether an instruction sequence to be optimized that includes at least the instruction and the other instruction fits in the current group of instructions, wherein the checking includes checking a marker associated with the instruction, the marker indicating a length of the instruction sequence; and
forming the new group of instructions based on determining the instruction is a candidate for optimization and the instruction sequence does not fit in the current group of instructions, wherein the new group of instructions includes the instruction and the other instruction; and

based on forming the new group of instructions, executing at least one instruction associated with the new group of instructions.

10. The computer system of claim 9 , wherein the determining comprises determining whether the instruction represents a beginning of a potential optimization sequence that includes the instruction and the other instruction, and wherein the forming forms the new group of instructions based on the instruction representing the beginning of a potential optimization sequence.

11. The computer system of claim 10 , wherein the determining whether the instruction represents the beginning of a potential optimization sequence comprises checking a selected marker associated with the instruction, the selected marker indicating whether the instruction starts a potential optimization sequence.

12. The computer system of claim 9 , wherein the optimization criterion optimizes the instruction and the other instruction by creating at least one internal operation that represents at least a portion of the instruction and at least a portion of the other instruction.

13. The computer system of claim 9 , wherein the optimization is performed at decode time.

14. The computer system of claim 11 , wherein the method further comprises marking the instruction with the selected marker, the selected marker indicating one of: the instruction is considered as representing the beginning of a potential optimization sequence, or the instruction is not considered as representing the beginning of a potential optimization sequence, and wherein the marking is performed at instruction fetch.

15. The computer system of claim 9 , wherein the method further comprises:
determining a number of instructions in the instruction sequence; and
marking the instruction with a marker that indicates the number of instructions, the marking being performed at instruction fetch.

16. The computer system of claim 9 , wherein the optimization criterion is specified in one or more templates, and wherein at least one template of the one or more templates is to be used to determine whether the instruction is a candidate for optimization.

Assignees

• IBM

Inventors

• Gschwind Michael K

Classifications

• G06F8/4441

  Reducing the execution time required by the program code · CPC title

• G06F9/3853

  of compound instructions · CPC title

• G06F9/3822

  Parallel decoding, e.g. parallel decode units · CPC title

• G06F9/3016

  Decoding the operand specifier, e.g. specifier format · CPC title

• G06F9/30196 Primary

  using decoder, e.g. decoder per instruction set, adaptable or programmable decoders · CPC title