Semiconductor device, and method of manufacturing semiconductor device

US9347620B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9347620-B2
Application numberUS-201414151192-A
CountryUS
Kind codeB2
Filing dateJan 9, 2014
Priority dateAug 8, 2013
Publication dateMay 24, 2016
Grant dateMay 24, 2016

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

According to one embodiment, a semiconductor device includes a board, a controller chip, a semiconductor chip, a sealing portion, and a component. The board includes a first surface and a second surface opposite to the first surface, the first surface comprising a terminal. The controller chip is on the second surface of the board. The semiconductor chip is on the second surface of the board. The sealing portion integrally covers the controller chip and the semiconductor chip and does not cover a region of the second surface of the board. The component is on the region of the second surface of the board to perform an operation with respect to the outside of the semiconductor device.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device comprising: a board comprising a first surface and a second surface opposite to the first surface, the first surface comprising a terminal; a controller chip on the second surface of the board; a semiconductor chip on the second surface of the board; a sealing portion integrally covering the controller chip and the semiconductor chip, wherein the sealing portion does not cover a region of the second surface of the board; and a component on the region of the second surface of the board to perform an operation with respect to the outside of the semiconductor device. 2. The device of claim 1 , wherein the component is a light source whose light emission is to be checked from the outside of the semiconductor device. 3. The device of claim 1 , wherein the region of the board is in an end of the board. 4. The device of claim 3 , wherein the region of the board extends over an entire width of the board. 5. A semiconductor device comprising: a board comprising a first surface and a second surface opposite to the first surface, the first surface comprising a terminal; a controller chip on the second surface of the board; a semiconductor chip on the second surface of the board; a component on the second surface of the board; a light transmitting portion on the second surface of the board, the light transmitting portion covering the component; and a sealing portion integrally covering the controller chip, the semiconductor chip, and the light transmitting portion, the sealing portion exposing a part of the light transmitting portion to the outside of the sealing portion. 6. The device of claim 5 , wherein the component is a light source whose light emission through the light transmitting portion is to be checked from the outside of the semiconductor device. 7. The device of claim 5 , wherein the component is in an end of the board, and the light transmitting portion is exposed from the end of the board to the outside of the sealing portion. 8. The device of claim 7 , wherein the board comprises a cut-out passing through from the first surface to the second surface to expose the light transmitting portion to a side of the first surface. 9. The device of claim 5 , wherein the board comprises a hole passing through from the first surface to the second surface to expose the light transmitting portion to a side of the first surface. 10. A method of manufacturing a semiconductor device comprising: preparing a base member comprising boards; arranging controller chips and semiconductor chips separately on both sides of a boundary line of the boards; arranging components separately on the both sides of the boundary line in positions closer to the boundary line than the controller chips and the semiconductor chips; forming a sealing portion so as to integrally cover the controller chips and the semiconductor chips and not to cover the components; and cutting the base member along the boundary line. 11. The method of claim 10 wherein each of the components is configured to perform an operation with respect to the outside of the semiconductor device. 12. The method of claim 10 wherein each of the components is a light source whose light emission is to be checked from the outside of the semiconductor device. 13. The method of claim 10 wherein the boards are arranged in the base member in a first direction and a second direction perpendicular to the first direction, the boundary line extends in the second direction, and a region not covered by the sealing portion continues extending over the plurality of boards in the second direction.

Assignees

Inventors

Classifications

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • by multiple encapsulations, e.g. by a thin protective coating and a thick encapsulation · CPC title

  • by a substrate and the encapsulations · CPC title

  • using batch processing · CPC title

Patent family

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Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9347620B2 cover?
According to one embodiment, a semiconductor device includes a board, a controller chip, a semiconductor chip, a sealing portion, and a component. The board includes a first surface and a second surface opposite to the first surface, the first surface comprising a terminal. The controller chip is on the second surface of the board. The semiconductor chip is on the second surface of the board. T…
Who is the assignee on this patent?
Toshiba Kk
What technology area does this patent fall under?
Primary CPC classification H10P54/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 24 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).