Manufacturing method of circuit board

US9340003B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9340003-B2
Application numberUS-201313919711-A
CountryUS
Kind codeB2
Filing dateJun 17, 2013
Priority dateMay 19, 2010
Publication dateMay 17, 2016
Grant dateMay 17, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A manufacturing method of a circuit board comprises the following steps. Firstly, provide a first core layer, a second core material layer, and a central dielectric material layer. Secondly, press the first core layer, the second core material layer, and the central dielectric material layer to form a composite circuit structure. Thirdly, removing a portion of the central dielectric material layer located at a periphery of a pre-removing area and a portion of the second core material layer located at the periphery of the pre-removing area. Finally, remove a portion of the central dielectric material layer located within the pre-removing area and a portion of the second core material layer located within the pre-removing area to form a central dielectric layer and a second core layer.

First claim

Opening claim text (preview).

What is claimed is: 1. A manufacturing method of a circuit board, comprising: providing a first core layer, a second core material layer, and a central dielectric material layer, wherein the first core layer comprises a core dielectric layer and a core circuit layer, the core circuit layer is disposed on the core dielectric layer and has a laser resistant pattern, the laser resistant pattern is located at a boundary of the pre-removing area, the laser resistant pattern is a portion of the core circuit layer and is physically independent from the rest of the core circuit layer, the second core material layer is disposed on the first core layer, and the central dielectric material layer is disposed between the first core layer and the second core material layer; pressing the first core layer, the second core material layer, and the central dielectric material layer to form a composite circuit structure, wherein a pre-removing area is defined on the composite circuit structure, and at least a portion of the core circuit layer is located within the pre-removing area; removing a portion of the central dielectric material layer located at the boundary of the pre-removing area and a portion of the second core material layer located at the boundary of the pre-removing area by laser etching; and removing a portion of the central dielectric material layer located within the pre-removing area and a portion of the second core material layer located within the pre-removing area to form a central dielectric layer and a second core layer. 2. The manufacturing method according to claim 1 , wherein the step of pressing the first core layer, the second core material layer, and the central dielectric material layer further comprises: pressing a first dielectric material layer and a first conductive layer onto the first core layer, wherein the first dielectric material layer is located between the first core layer and the first conductive layer; pressing a second dielectric material layer and a second conductive layer onto the second core layer, wherein the second dielectric material layer is located between the second core layer and the second conductive layer; and patterning the first conductive layer and the second conductive layer to form a first circuit layer and a second circuit layer. 3. The manufacturing method according to claim 2 further comprising: when removing the portion of the central dielectric material layer located at the boundary of the pre-removing area and the portion of the second core material layer located at the boundary of the pre-removing area, removing a portion of the second dielectric material layer located at the boundary of the pre-removing area; and when removing the portion of the central dielectric material layer located within the pre-removing area and the portion of the second core material layer located within the pre-removing area, removing a portion of the second dielectric material layer located within the pre-removing area to form a second dielectric layer. 4. The manufacturing method according to claim 1 further comprising performing an etching process or a mechanical processing to remove the laser resistant pattern. 5. The manufacturing method according to claim 1 , wherein the technique of removing the portion of the central dielectric material layer located within the pre-removing area and the portion of the second core material layer located within the pre-removing area comprises a lift-off technique. 6. The manufacturing method according to claim 1 , wherein the first core layer further comprises: a protection layer, covering the portion of the core circuit layer located within the pre-removing area. 7. The manufacturing method according to claim 6 further comprising: when or after removing the portion of the central dielectric material layer located within the pre-removing area and the portion of the second core material layer located within the pre-removing area, removing the protection layer.

Assignees

Inventors

Classifications

  • comprising holes having chips therein · CPC title

  • with cutting, punching, tearing or severing · CPC title

  • Using laser light · CPC title

  • H05K3/4697Primary

    having cavities, e.g. for mounting components (H05K3/4691 takes precedence) · CPC title

  • B32B38/10Primary

    Removing layers, or parts of layers, mechanically or chemically · CPC title

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Frequently asked questions

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What does patent US9340003B2 cover?
A manufacturing method of a circuit board comprises the following steps. Firstly, provide a first core layer, a second core material layer, and a central dielectric material layer. Secondly, press the first core layer, the second core material layer, and the central dielectric material layer to form a composite circuit structure. Thirdly, removing a portion of the central dielectric material la…
Who is the assignee on this patent?
Unimicron Technology Corp
What technology area does this patent fall under?
Primary CPC classification H05K3/4697. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 17 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).