Printed wiring board

US9320148B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9320148-B2
Application numberUS-201213431091-A
CountryUS
Kind codeB2
Filing dateMar 27, 2012
Priority dateMar 29, 2011
Publication dateApr 19, 2016
Grant dateApr 19, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A printed wiring board includes a core substrate having a penetrating hole extending through the core substrate, an electronic component accommodated in the penetrating hole of the core substrate, a filler resin filling clearance between the component and the core substrate, a first resin insulation layer formed on the component and a first surface of the core substrate, and a second resin insulation layer formed on the component and a second surface of the core substrate on the opposite side of the first surface of the core substrate. The filler resin has elastic modulus which is set to be lower than 0.2 Gpa and thermal expansion coefficient which is set to be higher than 100 ppm and lower than 200 ppm, and the core substrate has elastic modulus which is set to be higher than 30 Gpa, and thermal expansion coefficient which is set to be lower than 10 ppm.

First claim

Opening claim text (preview).

What is claimed is: 1. A printed wiring board, comprising: a core substrate having a penetrating hole extending through the core substrate; an electronic component accommodated in the penetrating hole of the core substrate; a filler resin filling a clearance between the electronic component and the core substrate; a first resin insulation layer formed on the electronic component and a first surface of the core substrate; and a second resin insulation layer formed on the el…

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Frequently asked questions

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What does patent US9320148B2 cover?
A printed wiring board includes a core substrate having a penetrating hole extending through the core substrate, an electronic component accommodated in the penetrating hole of the core substrate, a filler resin filling clearance between the component and the core substrate, a first resin insulation layer formed on the component and a first surface of the core substrate, and a second resin insu…
Who is the assignee on this patent?
Mikado Yukinobu, Sakai Shunsuke, Futamura Hirofumi, and 1 more
What technology area does this patent fall under?
Primary CPC classification H05K1/185. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 19 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).