Fabrication method of inverted solar cells

US9318643B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9318643-B2
Application numberUS-201414147498-A
CountryUS
Kind codeB2
Filing dateJan 4, 2014
Priority dateJul 7, 2011
Publication dateApr 19, 2016
Grant dateApr 19, 2016

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Abstract

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A fabrication method for an inverted solar cell includes: (1) providing a growth substrate; (2) depositing a SiO 2 mask layer over the surface of the growth substrate to form a patterned substrate; (3) forming a sacrificial layer with epitaxial growth over the patterned substrate, wherein the sacrificial layer encompasses the entire SiO 2 mask pattern; (4) forming a buffer layer over the sacrificial layer via epitaxial growth; (5) forming a semiconductor material layer sequence of the inverted solar cell over the buffer layer with epitaxial growth; (6) bonding the semiconductor material layer sequence of the inverted solar cell with a supporting substrate; (7) selectively etching the SiO 2 mask layer by wet etching; and (8) selectively etching the sacrificial layer by wet etching to lift off the growth substrate.

First claim

Opening claim text (preview).

The invention claimed is: 1. A fabrication method for an inverted solar cell, comprising: (1) providing a growth substrate; (2) depositing a SiO 2 mask layer over the surface of the growth substrate to form a patterned substrate; (3) forming a sacrificial layer with epitaxial growth over the patterned substrate, wherein the sacrificial layer surrounds the entire SiO 2 mask layer; (4) forming a buffer layer over the sacrificial layer via epitaxial growth; (5) forming a se…

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What does patent US9318643B2 cover?
A fabrication method for an inverted solar cell includes: (1) providing a growth substrate; (2) depositing a SiO 2 mask layer over the surface of the growth substrate to form a patterned substrate; (3) forming a sacrificial layer with epitaxial growth over the patterned substrate, wherein the sacrificial layer encompasses the entire SiO 2 mask pattern; (4) forming a buffer layer over the sacr…
Who is the assignee on this patent?
Xiamen Sanan Optoelectronics Technology Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10F71/1272. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 19 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).