Integrated circuit structure with metal cap and methods of fabrication

Patent metadata

Field	Value
Publication number	US-9318413-B2
Application number	US-201314065451-A
Country	US
Kind code	B2
Filing date	Oct 29, 2013
Priority date	Oct 29, 2013
Publication date	Apr 19, 2016
Grant date	Apr 19, 2016

Abstract

The present disclosure generally provides for an integrated circuit (IC) structure with a TSV, and methods of manufacturing the IC structure and the TSV. An IC structure according to embodiments of the present invention may include a through-semiconductor via (TSV) embedded within a substrate, the TSV having an axial end; and a metal cap contacting the axial end of the TSV, wherein the metal cap has a greater electrical resistivity than the TSV.

First claim

What is claimed is:

1. An integrated circuit (IC) structure comprising:
a through-semiconductor via (TSV) embedded within a substrate, the TSV having an axial end;
a dielectric layer adjacent to the substrate;
a liner contacting the TSV and positioned about the TSV;
a metal cap contacting the axial end of the TSV, wherein the metal cap has a greater electrical resistivity than the TSV;
a metal layer embedded in the dielectric layer and in contact with the metal cap and the liner, wherein the metal layer has a lower electrical resistivity than the metal cap, and wherein an interface between the metal layer, the liner, and the metal cap forms an elbow junction;
a first via extending from an axial end of the metal layer to the axial end of the TSV, wherein the first via forms an electrical connection between the metal layer and the TSV through the metal cap; and
a second via extending from the axial end of the metal layer to the metal cap such that a portion of the metal cap separates the second via from the TSV, wherein the second via is laterally interposed between the elbow junction and the first via.

2. The IC structure of claim 1 , wherein the metal cap is substantially annular and radially surrounds the axial end of the TSV.

3. The IC structure of claim 1 , wherein the metal cap includes at least one of a transition metal and a refractory metal.

4. The IC structure of claim 1 , wherein an axial thickness of the metal cap is lowest at a radial center of the metal cap and greatest at a radial perimeter of the metal cap, and wherein an opposing axial surface of the TSV positioned beneath the second via includes a tapered profile.

5. The IC structure of claim 1 , further comprising
a via coupling the metal layer with the axial end of the TSV, wherein the via includes a different material from the metal cap and is embedded within the dielectric layer.

6. The IC structure of claim 5 , further comprising a silicon pillar embedded within the TSV.

7. The IC structure of claim 6 , wherein the via comprises a plurality of vias, each of the plurality of vias being coupled to a region of the axial end of the TSV outside a perimeter of the silicon pillar.

8. The IC structure of claim 1 , further comprising another metal cap deposited onto another axial end of the TSV.

9. A method of fabricating a through-semiconductor via (TSV), the method comprising:
forming a TSV structure in a substrate, the TSV structure having an exposed first axial end and a liner region positioned about a conductive region of the TSV;
forming a metal cap on the exposed first axial end of the TSV structure, wherein the metal cap has a greater electrical resistivity than the TSV structure and wherein an upper surface of the metal cap is substantially coplanar with an upper surface of the liner region of the TSV structure;
forming a dielectric layer on the substrate;
removing a first portion of the dielectric layer to expose the TSV structure;
removing a second portion of the dielectric layer to expose the metal cap;
forming a plurality of vias within the dielectric layer, the plurality of vias including a first via in contact with the TSV structure and a second via in contact with the metal cap, such that a portion of the metal cap separates the second via from the TSV structure; and
forming a metal layer over the metal cap and the liner region of the TSV structure to form an elbow junction between the metal layer and the TSV structure along the upper surfaces of the liner and the metal cap, wherein the metal layer has a lower electrical resistivity than the metal cap, and wherein the second via is laterally interposed between the elbow junction and the first via.

10. The method of claim 9 , further comprising:
thinning a surface of the substrate to expose a second axial end of the TSV structure; and
forming another metal cap onto the exposed second axial end of the TSV structure.

11. The method of claim 9 , further comprising removing portions of the TSV structure above a desired depth, before forming the metal cap.

12. The method of claim 11 , wherein the removing includes etching.

13. The method of claim 11 , wherein the TSV structure, after the removing, includes a radially inner region and a radially outer region, and the desired depth includes a desired depth of the radially inner region and a desired depth of the radially outer region.

14. The method of claim 13 , further comprising removing a portion of the metal cap above the desired depth of the radially inner region, to expose a remaining portion of the metal cap and the radially inner region of the TSV structure.

15. The method of claim 9 , further comprising:
forming a dielectric layer on the substrate;
removing a portion of the dielectric layer, wherein the removing exposes one of the metal cap and the TSV structure; and
forming a via on the TSV structure, wherein the metal layer is formed over and in contact with the via to yield an electrical connection between the metal layer and the TSV structure with lower electrical resistance than through the metal cap.

16. The method of claim 15 , further comprising forming a plurality of vias on the TSV structure, wherein each of the plurality of vias is at least partially embedded within the metal cap.

17. A method of fabricating a through-semiconductor via (TSV), the method comprising:
forming a sacrificial collar about an axial end of a TSV structure;
removing the sacrificial collar; and
forming a metal cap on the axial end of the TSV structure, wherein a portion of the metal cap is located about the axial end of the TSV structure, and wherein a liner region of the TSV structure is positioned about the metal cap;
forming a dielectric layer on at least the metal cap and the TSV structure;
removing a first portion of the dielectric layer to expose the TSV structure;
removing a second portion of the dielectric layer to expose the metal cap;
forming a plurality of vias within the dielectric layer, the plurality of vias including a first via in contact with the TSV structure and a second via in contact with the metal cap, such that a portion of the metal cap separates the second via from the TSV structure; and
forming a metal layer over the metal cap and the liner region of the TSV structure to form an elbow junction between the metal layer and the TSV structure along the upper surfaces of the liner and the metal cap, wherein the metal layer has a lower electrical resistivity than the metal cap, and wherein the second via is laterally interposed between the elbow junction and the first via.

18. The IC structure of claim 5 , wherein the metal cap further includes:
a substantially disc-shaped first section, and
a substantially annular second section positioned about the first section, the second section having a greater axial width than the first section, wherein the second via extends through the second section of the metal cap.

19. The method of claim 15 , wherein the metal cap further includes:
a substantially disc-shaped first section, and
a substantially annular second section positioned about the first section, the second section having a greater axial width than the first section, wherein the second via extends through the second section of the metal cap.

Assignees

• Globalfoundries Inc

Inventors

• Chen Fen
• Kim Andrew T
• Lu Minhua
• Sullivan Timothy D
• Wang Ping-Chuan
• Zhang Lijuan

Classifications

• H10W20/216

  characterised by dielectric material at least partially filling the via holes, e.g. covering the through-semiconductor vias in the via holes · CPC title

• H10W20/0257

  comprising using a sacrificial placeholder, e.g. using a sacrificial plug · CPC title

• H10W20/0245

  comprising use of blind vias during the manufacture · CPC title

• H10W20/0261

  characterised by the filling method or the material of the conductive fill · CPC title

• H10W20/42

  Vias, e.g. via plugs · CPC title