FinFET structure with different fin heights and method for forming the same

Patent metadata

Field	Value
Publication number	US-9318367-B2
Application number	US-201313778261-A
Country	US
Kind code	B2
Filing date	Feb 27, 2013
Priority date	Feb 27, 2013
Publication date	Apr 19, 2016
Grant date	Apr 19, 2016

Abstract

A method for forming FinFETs comprises forming a plurality of first fins and a plurality of second fins protruding over a substrate, wherein two adjacent first fins are separated from each other by a plurality of first isolation regions and two adjacent second fins are separated from each other by a plurality of second isolation regions. The method further comprises applying a first ion implantation process to the first isolation region, wherein dopants with a first polarity type are implanted in the first isolation region, applying a second ion implantation process to the second isolation region, wherein dopants with a second polarity type are implanted in the second isolation region and recessing the first isolation regions and the second isolation regions through an etching process.

First claim

What is claimed is:

1. A method comprising:
forming a plurality of isolation regions in a substrate, wherein:
a first fin is surrounded by a first isolation region; and
a second fin is surrounded by a second isolation region;

applying a first ion implantation process to the first isolation region, wherein p-type dopants are implanted in the first isolation region;
applying a second ion implantation process to the second isolation region, wherein n-type dopants are implanted in the second isolation region;
after the first implantation process and the second implantation process, applying an anneal process to the substrate; and
applying an etching process to the first isolation region and the second isolation region to form a first portion and a second portion of the first fin, and a first portion and a second portion of the second fin, wherein:
the first portion of the first fin is over a top surface of the first isolation region; and
the first portion of the second fin is over a top surface of the second isolation region, and wherein a height of the first portion of the first fin is greater than a height of the first portion of the second fin, and wherein a height difference between the first portion of the first fin and the first portion of the second fin is formed in a single etching process.

2. The method of claim 1 , wherein:
the etching process is a dry etching process applied to the first isolation region and the second isolation region to form the first portion of the first fin and the first portion the second fin.

3. The method of claim 1 , further comprising wherein:
the etching process is a chemical oxide removal process applied to the first isolation region and the second isolation region to form the first portion of the first fin and the first portion the second fin.

4. The method of claim 1 , wherein:
the first isolation region is formed of oxide; and
the second isolation region is formed of oxide.

5. The method of claim 1 , wherein:
the first fin comprises drain/source regions of an n-type FinFET; and
the second fin comprises drain/source regions of a p-type FinFET.

6. A method comprising:
forming a plurality of first fins and a plurality of second fins protruding over a substrate, wherein:
two adjacent first fins are separated from each other by a first isolation region; and
two adjacent second fins are separated from each other by a second isolation region;

applying a first ion implantation process to the first isolation region, wherein p-type dopants are implanted in the first isolation region;
applying a second ion implantation process to the second isolation region, wherein n-type dopants are implanted in the second isolation region;
after the first implantation process and the second implantation process, applying an anneal process to the substrate; and
recessing the first isolation region and the second isolation region through an etching process, wherein a top surface of a remaining portion of the second isolation region is higher than a top surface of a remaining portion of the first isolation region, and wherein a height difference between the remaining portion of the second isolation region and the remaining portion of the first isolation region is determined by an etching rate difference between the first isolation region having the p-type dopants and the second isolation region having the n-type dopants.

7. The method of claim 6 , further comprising:
recessing the first isolation region and the second isolation region using 100:1 diluted hydrofluoric (HF).

8. The method of claim 6 , further comprising:
recessing the first isolation region and the second isolation region using a chemical oxide removal process.

9. The method of claim 6 , further comprising:
depositing a first photoresist layer over the plurality of second fins;
applying the first ion implantation process to the first isolation region; and
removing the first photoresist layer.

10. The method of claim 9 , further comprising:
depositing a second photoresist layer over the plurality of first fins;
applying the second ion implantation process to the second isolation region; and
removing the second photoresist layer.

11. A method comprising:
providing a substrate having a plurality of isolation regions;
applying a first implantation process to the substrate to form an n-type region;
applying a second implantation process to the substrate to form a p-type region;
implanting p-type dopants into isolation regions adjacent to the n-type region;
implanting n-type dopants into isolation regions adjacent to the p-type region;
after the first implantation process and the second implantation process, applying an anneal process to the substrate; and
recessing isolation regions surrounding the n-type region and the p-type region to form an n-type fin and a p-type fin, wherein:
the n-type fin is of a first height due to a first etching rate of the isolation region having the p-type dopants; and
the p-type fin is of a second height due to a second etching rate of the isolation region having the n-type dopants, and wherein the first height is greater than the second height, and wherein the first etching rate is higher than the second etching rate.

12. The method of claim 11 , further comprising:
the anneal process is of a temperature in a range from about 600 degrees to about 1300 degrees.

13. The method of claim 11 , wherein:
a height difference between the n-type fin and the p-type fin is greater than or equal to 2 nm.

14. The method of claim 11 , further comprising:
recessing the isolation regions surrounding the n-type region and the p-type region using a chemical oxide removal process.

15. The method of claim 11 , wherein:
the isolation regions surrounding the n-type region and the p-type region are formed of oxide.

Assignees

• Taiwan Semiconductor Mfg

Inventors

• Huang Yu-Lien
• Liu Chi-Kang
• Liu Chi-Wen

Classifications

• H10P95/90

  Thermal treatments, e.g. annealing or sintering · CPC title

• H10P50/642

  Chemical etching · CPC title

• H10P30/22

  using masks · CPC title

• H10W10/17

  formed using trench refilling with dielectric materials, e.g. shallow trench isolations · CPC title

• H10W10/014 Primary

  using trench refilling with dielectric materials, e.g. shallow trench isolations · CPC title