Method and apparatus for high temperature semiconductor device packages and structures using a low temperature process

Patent metadata

Field	Value
Publication number	US-9312231-B2
Application number	US-201314068496-A
Country	US
Kind code	B2
Filing date	Oct 31, 2013
Priority date	Oct 31, 2013
Publication date	Apr 12, 2016
Grant date	Apr 12, 2016

Abstract

A semiconductor device package that incorporates a combination of ceramic, organic, and metallic materials that are coupled using silver is provided. The silver is applied in the form of fine particles under pressure and a low temperature. After application, the silver forms a solid that has a typical melting point of silver, and therefore the finished package can withstand temperatures significantly higher than the manufacturing temperature. Further, since the silver is an interfacial material between the various combined materials, the effect of differing material properties between ceramic, organic, and metallic components, such as coefficient of thermal expansion, is reduced due to low temperature of bonding and the ductility of the silver.

First claim

What is claimed is:

1. A semiconductor device package comprising:
a first material portion of the semiconductor device package, wherein the first material comprises one of a ceramic or an organic material, wherein the first material portion comprises a printed circuit board;
a second material portion of the semiconductor device package, wherein the second material comprises a metallic slug; and
a sintered silver region disposed to couple the first and second material portions of the semiconductor device package, wherein
the sintered silver region is disposed within a hole formed in the printed circuit board, and
the second material portion is disposed within the sintered silver region.

2. The semiconductor device package of claim 1 further comprising:
a semiconductor device die thermally coupled to the metallic slug, wherein the metallic slug comprises copper.

3. The semiconductor device package of claim 1 further comprising:
a second metallic slug disposed within the sintered silver, wherein the sintered silver thermally and electrically couples the metallic slug and the second metallic slug.

4. A semiconductor device package comprising:
a first material portion of the semiconductor device package, wherein the first material comprises one of a ceramic or an organic material, wherein the first material portion comprises a printed circuit board;
a second material portion of the semiconductor device package, wherein the second material portion comprises a passive electronic device disposed within the sintered silver region, wherein the sintered silver electrically couples the passive electronic device to an interconnect formed on the printed circuit board;
a sintered silver region disposed to couple the first and second material portions of the semiconductor device package, wherein
the sintered silver region is disposed within a hole formed in the printed circuit board, and
the second material portion is disposed within the sintered silver region.

5. The semiconductor device package of claim 4 , wherein the passive semiconductor device comprises a high capacitance material.

Assignees

• Viswanathan Lakshminarayan
• Freescale Semiconductor Inc

Inventors

• Viswanathan Lakshminarayan

Classifications

• H10P14/46

  using a liquid · CPC title

• H10W90/756

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W90/754

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/753

  between laterally-adjacent chips · CPC title

• H10W90/736

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title