Metallized via-holed ceramic substrate, and method for manufacture thereof

Patent metadata

Field	Value
Publication number	US-9307637-B2
Application number	US-201213710805-A
Country	US
Kind code	B2
Filing date	Dec 11, 2012
Priority date	Jan 25, 2012
Publication date	Apr 5, 2016
Grant date	Apr 5, 2016

Abstract

The present invention provides a metallized via-holed ceramic substrate having (1) a sintered ceramic substrate, (2) an electroconductive via formed in the sintered ceramic substrate, having an electroconductive metal closely filled in a through-hole of the sintered ceramic substrate, wherein the electroconductive metal contains a metal (A) with melting point of 600° C. to 1100° C., a metal (B) with higher melting point than the metal (A), and an active metal, (3) a wiring pattern on at least one face of the sintered ceramics substrate, having an electroconductive surface layer and a plating layer thereon, wherein the electroconductive surface layer consists of an electroconductive metal containing the metal (A), the metal (B), and an active metal, (4) an active layer formed in the interface between the electroconductive via and the sintered ceramic substrate, and (5) an active layer formed in the interface between the electroconductive surface layer and the sintered ceramic substrate.

First claim

The invention claimed is:

1. A metallized via-holed ceramic substrate comprising: a sintered ceramic substrate; an electroconductive via formed in the sintered ceramic substrate, said electroconductive via having an electroconductive metal closely filled in a through-hole of the sintered ceramic substrate, said electroconductive metal containing a metal (A) having a melting point of 600° C. to 1100° C., a metal (B) having a melting point higher than the melting point of the metal (A), and an active metal; a wiring pattern on at least one face of the sintered ceramic substrate, said wiring pattern having an electroconductive surface layer and a plating layer on a surface of the electroconductive surface layer, said electroconductive surface layer consisting of an electroconductive metal containing the metal (A), the metal (B), and the active metal; an active layer formed in an interface between the electroconductive via and the sintered ceramic substrate; and an active layer formed in an interface between the electroconductive surface layer and the sintered ceramic substrate, wherein said metal (A) having a melting point of 600° C. to 1100° C. is one or more selected from a group consisting of gold solder, silver solder, and copper; and said metal (B) having a melting point higher than the melting point of the metal (A) is one or more selected from a group consisting of silver, copper, and gold.

2. The metallized via-holed ceramic substrate according to claim 1 ,
wherein each said active layer is a reaction layer formed via a reaction of each said active metal with a ceramic component of the sintered ceramic substrate.

3. The metallized via-holed ceramic substrate according to claim 2 , wherein
said active metals are titanium;
said ceramic component to react with the titanium is nitrogen; and
said reaction layers are titanium nitride layers.

4. The metallized via-holed ceramic substrate according to claim 1 ,
wherein said sintered ceramic substrate is a sintered aluminum nitride substrate.

5. The metallized via-holed ceramic substrate according to claim 1 ,
wherein said plating layer comprises a copper plating layer.

6. The metallized via-holed ceramic substrate according to claim 1 ,
wherein said wiring pattern is a metallized pattern formed by a photolithographic method.

7. The metallized via-holed ceramic substrate according to claim 1 ,
wherein a line-and-space of said wiring pattern is no more than 50 μm/50 μm.

8. A method for manufacturing the metallized via-holed ceramic substrate as in claim 1 , the method comprising the steps of:
(i) preparing a sintered ceramic substrate having a through-hole;
(ii) filling a first metal paste into the through-hole, wherein said first metal paste contains a powder of a metal (B) having a melting point higher than a melting point of a metal (A), and an active metal powder;
(iii) applying a second metal paste on at least one face of the sintered ceramic substrate, thereby forming a second metal paste layer where the second metal paste contacts with the first metal paste filled in the through-hole, wherein said second metal paste contains a powder of a metal (B′) having a melting point higher than the melting point of the metal (A) and an active metal powder;
(iv) applying a third metal paste on the second metal paste layer, thereby forming a third metal paste layer, wherein said third metal paste contains a powder of the metal (A) having a melting point of 600° C. to 1100° C., and wherein an area where said third metal paste layer is formed overlaps with an area occupied by an opening of the through-hole in contact with the second metal paste layer in contact with formed said third metal paste layer in a penetrative plan view of the sintered ceramic substrate;
(v) firing the substrate obtained via the preceding steps (i) to (iv), thereby forming an electroconductive via in the through-hole, an electroconductive surface layer on the sintered ceramic substrate, an active layer in an interface between the electroconductive via and the sintered ceramic substrate, and an active layer in an interface between the electroconductive surface layer and the sintered ceramic substrate;
(vi) forming a plating layer on the electroconductive surface layer;
(vii) forming a resist pattern on a part of the plating layer to be left as a wiring pattern;
(viii) removing a part of the plating layer and the electroconductive surface layer not covered by the resist pattern, by an etching process;
(ix) removing the resist pattern; and
(x) etching an exposed part of the active layer formed in the interface between the electroconductive surface layer and the sintered ceramic substrate,
wherein said metal (A) having a melting point of 600° C. to 1100° C. is one or more selected from a group consisting of gold solder, silver solder, and copper; and
said metal (B) having a melting point higher than the melting point of the metal (A) is one or more selected from a group consisting of silver, copper, and gold.

9. A method for manufacturing the metallized via-holed ceramic substrate as in claim 1 , the method comprising the steps of:
(i) preparing a sintered ceramic substrate having a through-hole;
(ii) filling a first metal paste into the through-hole, said first metal paste containing a powder of a metal (B) having a melting point higher than a melting point of a metal (A), and an active metal powder;
(iii) applying a second metal paste on at least one face of the sintered ceramic substrate, thereby forming a second metal paste layer where the second metal paste contacts with the first metal paste filled in the through-hole, wherein said second metal paste contains a powder of a metal (B′) having a melting point higher than the melting point of the metal (A) and an active metal powder;
(iv) applying a third metal paste on the second metal paste layer, thereby forming a third metal paste layer, wherein said third metal paste contains a powder of the metal (A) having a melting point of 600° C. to 1100° C., and wherein an area where said third metal paste layer is formed overlaps with an area occupied by an opening of the through-hole in contact with the second metal paste layer in contact with formed said third metal paste layer in a penetrative plan view of the sintered ceramic substrate;
(v) firing the substrate obtained via the preceding steps (i) to (iv), thereby forming an electroconductive via in the through-hole, an electroconductive surface layer on the sintered ceramic substrate, an active layer in an interface between the electroconductive via and the sintered ceramic substrate, and an active layer in an interface between the electroconductive surface layer and the sintered ceramic substrate;
(vi) forming a resist pattern on a part of the electroconductive surface layer where a wiring pattern is not to be formed;
(vii) forming a plating layer on a part of the electroconductive surface layer not covered by the resist pattern;
(viii) removing the resist pattern;
(ix) etching an exposed part of the electroconductive surface layer; and
(x) etching an exposed part of the active layer formed in the interface between the electroconductive surface layer and the sintered ceramic substrate,
wherein said metal (A) having a melting point of 600° C. to 1100° C. is one or more selected from a group consisting of gold solder, silver solder, and copper; and
said metal (B) having a melting point higher than the melting point of the metal (A) is one or more selected from a group consisting of silver, copper, and gold.

10. The method for manufacturing the metallized via-holed ceramic substrate according to claim 9 , further comprising the step of:
(v′) forming an anti-oxidation la

Assignees

• Tokuyama Corp

Inventors

• Takahashi Naoto
• Yamamoto Yasuyuki

Classifications

• H10W70/692

  Ceramics or glasses · CPC title

• H10W70/635

  Through-vias · CPC title

• H05K3/245

  Reinforcing conductive patterns made by printing techniques or by other techniques for applying conductive pastes, inks or powders; Reinforcing other conductive patterns by such techniques · CPC title

• H05K3/246

  Reinforcing conductive paste, ink or powder patterns by other methods, e.g. by plating · CPC title

• H05K2203/1476

  Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning · CPC title