Phase interpolator calibration

US9306729B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9306729-B2
Application numberUS-201414154203-A
CountryUS
Kind codeB2
Filing dateJan 14, 2014
Priority dateJan 14, 2014
Publication dateApr 5, 2016
Grant dateApr 5, 2016

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Abstract

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System, method and computer program product for setting phase control codes to (in-phase) I and (quadrature) Q rotators to a first code pair, different by enough to produce a phase difference between the rotator outputs sufficient to be detected with minimal error by a phase-to-voltage converter. Auxiliary trim DACs are then adjusted according to calibration logic until a comparator output detects a phase difference between the I and Q rotators are within tolerable limits. The resulting trim codes are stored for both the codes in the pair. These trim codes along with the main codes are subsequently applied whenever the codes are used thereafter. These steps are repeated with each successive code pair having the same separation as the first code pair, e.g. both incremented by same amount until all codes have been calibrated. In this manner having the phase separation between all code pairs forced to the same value.

First claim

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What is claimed is: 1. A calibration apparatus for a phase interpolator (PI), the interpolator having: a first current mixer and a second current mixer, the first mixer generating a first clock signal of a first phase according to bias currents applied to said first mixer according to a received first digital code value, and the second mixer generating a second clock signal of a second phase offset from said first phase according to a received second digital code value, said appar…

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What does patent US9306729B2 cover?
System, method and computer program product for setting phase control codes to (in-phase) I and (quadrature) Q rotators to a first code pair, different by enough to produce a phase difference between the rotator outputs sufficient to be detected with minimal error by a phase-to-voltage converter. Auxiliary trim DACs are then adjusted according to calibration logic until a comparator output dete…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification H04L7/0029. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 05 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).