Intermetallic compound filled vias

US9305866B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9305866-B2
Application numberUS-201414189389-A
CountryUS
Kind codeB2
Filing dateFeb 25, 2014
Priority dateFeb 25, 2014
Publication dateApr 5, 2016
Grant dateApr 5, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Electronic devices including intermetallic columns within vias are provided. Vias are filled with one or more pastes containing metal particles. Thermal treatment of the pastes within the vias converts the particles within the pastes to one or more intermetallic compounds that do not melt during next level packaging.

First claim

Opening claim text (preview).

What is claimed is: 1. A method comprising: obtaining a structure including a wafer having top and bottom surfaces and a plurality of vias extending within the wafer; injecting the vias with a paste containing a mixture of first particles comprising at least one of tin and indium and second particles of a metal capable of forming one or more intermetallic compounds with the first particles, thereby forming paste mixture columns within the vias, the paste mixture columns including first portions within the vias and surface portions, and within the vias, thermally converting the first particles and the second particles within the paste mixture columns into a plurality of electrically conductive columns consisting essentially of one or more intermetallic compounds by sequentially: melting the first particles within the first portions of the paste mixture columns while maintaining ambient temperature below the melting point of the first particles; raising the ambient temperature above the melting point of the first particles to cause melting of the first particles in the surface portions of the paste mixture columns; cooling the first portions of the paste mixture columns while maintaining the ambient temperature above the melting point of the first particles, thereby forming intermetallic first portions of the electrically conductive columns, and reducing the ambient temperature, thereby forming intermetallic surface portions of the electrically conductive columns. 2. The method of claim 1 , wherein the first particles comprise tin and the second particles are copper particles, further including thermally converting the first particles comprising tin and the copper particles within the paste mixture columns into Cu 6 Sn 5 , the particles comprising tin and the copper particles being mixed in a selected ratio such that the plurality of electrically conductive columns each consists essentially of Cu 6 Sn 5 . 3. The method of claim 1 , further including the step of evacuating the vias, thereby facilitating injecting the paste into the vias. 4. The method of claim 3 , further including the step of providing an injection apparatus having a chamber and a chamber outlet, filling the chamber with the paste, and wherein the step of injecting the vias further includes applying pressure to the paste within the chamber and causing the paste to exit the chamber through the outlet. 5. The method of claim 4 , further including the step of curing the paste within the vias prior to the step of thermally converting. 6. The method of claim 1 , wherein the step of thermally converting further includes heating the wafer to cause the melting of the first particles within the first portions of the paste mixture columns. 7. The method of claim 1 , further including providing a substrate, at least one of the substrate and wafer including solder bumps, placing the substrate and wafer in adjoining relation to each other, and causing reflow of the solder bumps while the electrically conductive columns remain solid during reflow. 8. The method of claim 1 , wherein the paste contains tin particles and nickel particles, further including thermally converting the first and second particles within the paste mixture columns into Ni 3 Sn 4 , the particles comprising tin and the nickel particles being mixed in a selected ratio such that the plurality of electrically conductive columns each consists essentially of Ni 3 Sn 4 . 9. The method of claim 1 , wherein the paste includes a tin-containing paste blended with one of a copper paste and a nickel paste, the tin-containing paste containing flux and having a metal loading of fifty to eighty percent, the one of the copper paste and nickel paste having a metal loading between twelve and ninety percent. 10. The method of claim 1 , wherein the vias extend through the wafer, further including the step of applying vacuum pressure to the vias from the bottom surface of the wafer, thereby facilitating injecting the vias with the paste. 11. The method of claim 1 , further including the step of mixing a first paste containing the first particles with a second paste containing the second particles, thereby obtaining the paste containing the mixture of first particles and second particles. 12. The method of claim 11 , wherein the first paste includes one of pure tin and a tin solder alloy.

Assignees

Inventors

Classifications

  • Soldering or alloying · CPC title

  • comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu · CPC title

  • Applying pastes or inks, e.g. screen printing (H10W70/095 takes precedence) · CPC title

  • Insulating materials thereof · CPC title

  • Conductive materials thereof · CPC title

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Frequently asked questions

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What does patent US9305866B2 cover?
Electronic devices including intermetallic columns within vias are provided. Vias are filled with one or more pastes containing metal particles. Thermal treatment of the pastes within the vias converts the particles within the pastes to one or more intermetallic compounds that do not melt during next level packaging.
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification H10W70/635. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 05 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).