Methods for fabricating integrated circuits using directed self-assembly including lithographically-printable assist features

Patent metadata

Field	Value
Publication number	US-9305800-B2
Application number	US-201414185491-A
Country	US
Kind code	B2
Filing date	Feb 20, 2014
Priority date	Feb 20, 2014
Publication date	Apr 5, 2016
Grant date	Apr 5, 2016

Abstract

Methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes forming assisting etch resistant fill topographical features that overlie a semiconductor substrate and that define an assisting etch resistant fill confinement well using a photomask. The photomask defines an assisting lithographically-printable mask feature. A block copolymer is deposited into the assisting etch resistant fill confinement well. The block copolymer is phase separated into an etchable phase and an etch resistant phase. The assisting etch resistant fill topographical features direct the etch resistant phase to form an etch resistant plug in the assisting etch resistant fill confinement well.

First claim

What is claimed is:

1. A method for fabricating an integrated circuit comprising:
forming assisting etch resistant fill topographical features that overlie a semiconductor substrate and that define an assisting etch resistant fill confinement well using a photomask that defines an assisting lithographically-printable mask feature;
depositing a block copolymer into the assisting etch resistant fill confinement well; and
phase separating the block copolymer into an etchable phase and an etch resistant phase defining a phase separated block copolymer, wherein the assisting etch resistant fill topographical features direct the etch resistant phase to form an etch resistant plug in the assisting etch resistant fill confinement well, and wherein the method further comprises etching the phase separated block copolymer to remove at least a portion of the etchable phase and the etch resistant plug obstructs etching continuously through the phase separated block copolymer such that an opening does not extend fully through the phase separated block copolymer that is in the assisting etch resistant fill confinement well.

2. The method of claim 1 , wherein phase separating comprises forming the etch resistant plug extending laterally substantially across the assisting etch resistant fill confinement well.

3. The method of claim 1 , wherein phase separating comprises forming the etch resistant plug surrounding a portion of the etchable phase.

4. The method of claim 1 , wherein forming the assisting etch resistant fill topographical features comprise forming the assisting etch resistant fill confinement well having a predetermined depth that facilitates directing formation of the etch resistant plug.

5. The method of claim 4 , wherein forming the assisting etch resistant fill topographical features comprise forming the assisting etch resistant fill confinement well having the predetermined depth defined by computational simulations.

6. The method of claim 4 , wherein forming the assisting etch resistant fill topographical features comprise forming the assisting etch resistant fill confinement well having the predetermined depth defined experimentally.

7. The method of claim 1 , wherein forming the assisting etch resistant fill topographical features comprise forming the assisting etch resistant fill confinement well having a predetermined width that facilitates directing formation of the etch resistant plug.

8. The method of claim 7 , wherein forming the assisting etch resistant fill topographical features comprise forming the assisting etch resistant fill confinement well having the predetermined width defined by computational simulations.

9. The method of claim 7 , wherein forming the assisting etch resistant fill topographical features comprise forming the assisting etch resistant fill confinement well having the predetermined width defined experimentally.

10. The method of claim 1 , wherein depositing the block copolymer comprises depositing the block copolymer having a volume fraction minority phase and a volume fraction majority phase.

11. The method of claim 10 , wherein phase separating the block copolymer comprises phase separating the block copolymer into the volume fraction majority phase as the etch resistant phase.

12. The method of claim 10 , wherein phase separating the block copolymer comprises phase separating the block copolymer into the volume fraction minority phase as the etchable phase.

13. A method for fabricating an integrated circuit comprising:
lithographically transferring a DSA directing lithographically-printable mask feature and an assisting lithographically-printable mask feature from a photomask to a photoresist layer that overlies a semiconductor substrate for correspondingly forming graphoepitaxy DSA directing features that define a graphoepitaxy DSA directing confinement well and assisting etch resistant fill topographical features that define an assisting etch resistant fill confinement well;
filling the graphoepitaxy DSA directing confinement well with a first quantity of a block copolymer;
filling the assisting etch resistant fill confinement well with a second quantity of the block copolymer;
phase separating the first quantity of the block copolymer into a first etchable phase and a first etch resistant phase, wherein the graphoepitaxy DSA directing features direct the first etchable phase to extend longitudinally substantially through the graphoepitaxy DSA directing confinement well; and
phase separating the second quantity of the block copolymer into a second etchable phase and a second etch resistant phase, wherein the assisting etch resistant fill topographical features direct the second etch resistant phase to obstruct the second etchable phase from extending longitudinally substantially through the assisting etch resistant fill confinement well.

14. The method of claim 13 , wherein phase separating the first quantity of the block copolymer comprises directing the first etchable phase to form an etchable cylinder that extends longitudinally substantially through the graphoepitaxy DSA directing confinement well.

15. The method of claim 13 , further comprising:
depositing a neutral brush layer overlying the semiconductor substrate, wherein lithographically transferring comprises forming the graphoepitaxy DSA directing features and the assisting etch resistant fill topographical features overlying the neutral brush layer.

16. The method of claim 13 , wherein phase separating the second quantity of the block copolymer comprises directing the second etch resistant phase with the assisting etch resistant fill topographical features to form an etch resistant plug, and wherein the method further comprises:
etching the block copolymer after phase separating the first and second quantities to remove the first etchable phase from the graphoepitaxy DSA directing confinement well to form a first opening while obstructing etching of the second quantity of the block copolymer with the etch resistant plug to prevent forming an opening through the assisting etch resistant fill confinement well, thereby defining an etch mask.

17. The method of claim 16 , further comprising:
etching a second opening into the semiconductor substrate using the etch mask, wherein the second opening is aligned with the first opening.

18. The method of claim 13 , wherein lithographically transferring comprises exposing the photomask to a light source to lithographically transfer the DSA directing lithographically-printable mask feature and the assisting lithographically-printable mask feature to the photoresist layer.

19. The method of claim 18 , wherein lithographically transferring comprises exposing the photomask to a direct ultraviolet light source.

20. A method for fabricating an integrated circuit comprising:
patterning a photoresist layer that overlies a semiconductor substrate using a photomask that defines a DSA directing lithographically-printable mask feature;
selectively etching the patterned photoresist layer to form a plurality of topographical features including graphoepitaxy DSA directing features that lithographically correspond to the DSA directing lithographically-printable mask feature and side-lobe etch resistant fill topographical features, wherein the graphoepitaxy DSA directing features define a graphoepitaxy DSA directing confinement well and the side-lobe etch resistant fill topographical features define a side-lobe etch resistant fill confinement well;
depositing a block copolymer into the graphoep

Assignees

• Globalfoundries Inc

Inventors

• Coskun Tamer
• Wang wei-long
• Latypov Azat
• Zou Yi

Classifications

• H10P76/2041

  Photolithographic processes · CPC title

• H10P50/691

  for Group V materials or Group III-V materials · CPC title

• H10P50/695 Primary

  characterised by the process involved to create the mask, e.g. lift-off masks or sidewalls or to modify the mask · CPC title

• H01L21/308

  Electricity · mapped topic

• H01L21/3086 Primary

  Electricity · mapped topic