Manufacturing method for semiconductor structure
US-12165910-B2 · Dec 10, 2024 · US
Methods for etching silicon using hydrogen radicals in a hot wire chemical vapor deposition chamber
US9305796B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9305796-B2 |
| Application number | US-201414533389-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 5, 2014 |
| Priority date | Nov 5, 2013 |
| Publication date | Apr 5, 2016 |
| Grant date | Apr 5, 2016 |
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Abstract
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Methods for etching silicon using hydrogen radicals in a hot wire chemical vapor deposition process are provided herein. In some embodiments, a method of processing a substrate having a crystalline silicon layer atop the substrate and a patterned masking layer atop the crystalline silicon layer exposing portions of the crystalline silicon layer; the method may include (a) exposing the substrate to a plasma formed from an inert gas wherein ions from the plasma amorphize a first part of the exposed portions of the crystalline silicon layer; and (b) exposing the substrate to hydrogen radicals generated from a process gas comprising a hydrogen-containing gas in a hot wire chemical vapor deposition (HWCVD) process chamber to etch the amorphized first part of the exposed portion of the crystalline silicon layer.
First claim
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The invention claimed is: 1. A method of processing a substrate having a crystalline silicon layer atop the substrate and a patterned masking layer atop the crystalline silicon layer exposing portions of the crystalline silicon layer; the method comprising: (a) exposing the substrate to a plasma formed only from at least one noble gas wherein ions from the plasma amorphize a first part of the exposed portions of the crystalline silicon layer; and (b) exposing the substrate to hy…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
- H10P50/283Primary
Electricity · mapped topic
Electricity · mapped topic
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- What does patent US9305796B2 cover?
- Methods for etching silicon using hydrogen radicals in a hot wire chemical vapor deposition process are provided herein. In some embodiments, a method of processing a substrate having a crystalline silicon layer atop the substrate and a patterned masking layer atop the crystalline silicon layer exposing portions of the crystalline silicon layer; the method may include (a) exposing the substrate…
- Who is the assignee on this patent?
- Applied Materials Inc
- What technology area does this patent fall under?
- Primary CPC classification H10P50/283. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Apr 05 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).