Baud rate phase detector with no error latches

Patent metadata

Field	Value
Publication number	US-9304535-B2
Application number	US-201414222157-A
Country	US
Kind code	B2
Filing date	Mar 21, 2014
Priority date	Feb 17, 2014
Publication date	Apr 5, 2016
Grant date	Apr 5, 2016

Abstract

Phase detectors and timing recovery techniques that do not require error latches nor oversampling of the received input data are disclosed. The phase detection method includes separating an input signal into N consecutive data bits; comparing at least two consecutive data bits within the N consecutive data bits; estimating a data bit value for each of the N consecutive data bits; and determining a phase difference based on a data bit pattern formed by the data bit values of the N consecutive data bits and the comparison of the at least two consecutive data bits within the N consecutive data bits.

First claim

What is claimed is:

1. A phase detector, comprising:
a signal processor configured to separate an input signal into N consecutive data bits;
a comparator configured to compare at least two consecutive data bits within the N consecutive data bits;
a set of N estimation modules each configured to estimate a data bit value for each of the N consecutive data bits; and
a computing module configured to determine a phase difference based on a data bit pattern formed by the data bit…

Assignees

• Lsi Corp
• Avago Technologies General Ip

Inventors

• Shvydun Volodymyr
• Healey Adam B
• Palusa Chaitanya
• Pham Hiep T

Classifications

• G06F1/12 Primary

  Physics · mapped topic

• H04L27/2695

  Electricity · mapped topic

• H04L25/022

  Electricity · mapped topic

• H04L7/0338

  Electricity · mapped topic

• H03L7/087

  Electricity · mapped topic