Techniques for resonant rotary clocking for die-to-die communication
US-2024429865-A1 · Dec 26, 2024 · US
Method and apparatus performing clock extraction utilizing edge analysis upon a training sequence equalization pattern
US9128643B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9128643-B2 |
| Application number | US-201313896343-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 17, 2013 |
| Priority date | May 17, 2012 |
| Publication date | Sep 8, 2015 |
| Grant date | Sep 8, 2015 |
How to read this patent
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
- Title
What the patent document calls the invention.
- Abstract
A short plain-language summary of the technical disclosure.
- Assignees and inventors
Who owns or filed the patent and who is credited as inventor.
- Key dates
Filing, priority, publication, and grant dates set the timeline.
- First independent claim
The legal scope of protection — read this for what is actually claimed.
- CPC / IPC classifications
Technology tags used to group this patent with similar filings.
- Citations and related patents
Prior art links and similar publications in this corpus.
Abstract
Official abstract text for this publication.
A method and apparatus for performing clock extraction are provided. The method includes: performing edge analysis on a Training Sequence Equalization (TSEQ) pattern carried by a set of received signals that are received from a Universal Serial Bus (USB) port of an electronic device, to dynamically generate a plurality of analysis results; and performing frequency calibration on a frequency of an output clock of a Numerically Controlled Oscillator (NCO) according to a frequency that different types of analysis results within the plurality of analysis results alternatively occur, to utilize the output clock as a reference clock after completing the frequency calibration. More particularly, the method further includes: generating a set of de-multiplexed signals respectively corresponding to a plurality of bits, to perform the edge analysis by comparing respective voltage levels of de-multiplexed signals corresponding to every two adjacent bits of the plurality of bits within the set of de-multiplexed signals.
First claim
Opening claim text (preview).
What is claimed is: 1. A method applied to an electronic device for performing clock extraction, comprising: performing edge analysis upon a training sequence equalization (TSEQ) pattern carried by a set of received signals that are received via a Universal Serial Bus (USB) port of the electronic device, and accordingly obtain a plurality of estimated edge numbers; generating a plurality of analysis results according to the plurality of estimated edge numbers and a predetermined…
Assignees
Inventors
Classifications
Patent family
Related publications grouped by family.
External sources
Next steps
Free tools are coming soon. Tell us what you want to track and we'll notify you.
Frequently asked questions
Answers are generated from the same data shown on this page.
- What does patent US9128643B2 cover?
- A method and apparatus for performing clock extraction are provided. The method includes: performing edge analysis on a Training Sequence Equalization (TSEQ) pattern carried by a set of received signals that are received from a Universal Serial Bus (USB) port of an electronic device, to dynamically generate a plurality of analysis results; and performing frequency calibration on a frequency of …
- Who is the assignee on this patent?
- Silicon Motion Inc
- What technology area does this patent fall under?
- Primary CPC classification G06F1/12. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Sep 08 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).