Method for manufacturing microthrough-hole in circuit board and circuit board structure with microthrough-hole

US9301405B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-9301405-B1
Application numberUS-201514604956-A
CountryUS
Kind codeB1
Filing dateJan 26, 2015
Priority dateJan 26, 2015
Publication dateMar 29, 2016
Grant dateMar 29, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method for manufacturing microthrough-hole includes electroplating a metal layer on a carrier plate, patterning the metal layer to form a first circuit having copper pads, covering the first circuit with a photoresist layer and not covering the copper window between two of the copper pads, etching the metal layer beneath the copper window and removing the photoresist layer, sequentially forming an insulation layer and a second circuit on the first circuit and the copper window, the second circuit layer having a stop pad corresponding to the copper window, removing the carrier plate, upward drilling through the insulation layer between the stop pad and the copper window to form a microthrough-hole beneath the stop pad, and forming a conductive layer in the microthrough-hole to form the microthrough-hole connecting the first and second circuits. The microthrough-hole and its occupied area is greatly reduced, thereby achieving high circuit density.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for manufacturing microthrough-hole in circuit board, comprising: preparing a carrier plate; electroplating a metal layer on the carrier plate; forming a first circuit with a plurality of copper pads on one surface of the metal layer; covering the first circuit with a photoresist layer, wherein a copper window between two of the copper pads is not covered; etching the metal layer beneath the copper window until the carrier plate is exposed and removing the photoresist layer; sequentially forming an insulation layer and a second circuit on the first circuit and the copper windows, the second circuit layer having a stop pad corresponding to the copper window; removing the carrier plate; employing a drilling process to upward drill through the insulation layer corresponding to the copper window and stop at the stop pad so as to form a microthrough-hole beneath the stop pad; and forming a conductive layer in the microthrough-hole to electrically connect the first circuit and the second circuit. 2. The method as claimed in claim 1 , wherein the first circuit is formed by a process of patterned dry film electroplating. 3. The method as claimed in claim 1 , wherein the drilling process is a laser drilling process, employing a mask to define a size of a laser beam, and a size of the microthrough-hole is specified by a size of the copper window. 4. The method as claimed in claim 1 , wherein the microthrough-hole is a blind hole or a buried hole. 5. The method as claimed in claim 1 , wherein the photoresist layer is formed of a dry film photoresist or a wet film photoresist. 6. The method as claimed in claim 1 , wherein the conductive layer is implemented by a metal layer. 7. The method as claimed in claim 1 , wherein after the microthrough-hole is formed, another surface of the metal layer is provided with a dry film exposing the microthrough-hole, a copper layer is then chemically electroplated on a sidewall of the microthrough-hole, the conductive layer is formed by electrically electroplating, the dry film is removed, and part of the metal layer is etched until the first circuit is exposed.

Assignees

Inventors

Classifications

  • of insulating or insulated package substrates, or of interposers, or of redistribution layers (manufacture or treatment of leadframes H10W70/04) · CPC title

  • Use of materials for the {conductive, e.g. } metallic pattern · CPC title

  • Via connections; Lands around holes or via connections (H05K1/112 takes precedence) · CPC title

  • Blind vias, i.e. vias having one side closed · CPC title

  • by direct electroplating · CPC title

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Frequently asked questions

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What does patent US9301405B1 cover?
A method for manufacturing microthrough-hole includes electroplating a metal layer on a carrier plate, patterning the metal layer to form a first circuit having copper pads, covering the first circuit with a photoresist layer and not covering the copper window between two of the copper pads, etching the metal layer beneath the copper window and removing the photoresist layer, sequentially formi…
Who is the assignee on this patent?
Kinsus Interconnect Tech Corp
What technology area does this patent fall under?
Primary CPC classification H05K3/4038. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 29 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).