Method and apparatus for cooling semiconductor device hot blocks and large scale integrated circuit (IC) using integrated interposer for IC packages

Patent metadata

Field	Value
Publication number	US-9299634-B2
Application number	US-51491706-A
Country	US
Kind code	B2
Filing date	Sep 5, 2006
Priority date	May 16, 2006
Publication date	Mar 29, 2016
Grant date	Mar 29, 2016

Abstract

A method, system, and apparatus for improved IC device packaging is described. In an aspect, an (IC) device package includes an IC die having at one or more contact pads, each contact pad located at a corresponding hotspot on a surface of the IC die. The package also includes a thermally conductive interposer which is thermally coupled to the IC die at the contact pads. In another aspect, an underfill material fills a space between the IC die and the interposer. The interposer may also be electrically coupled to the IC die. In an aspect, the interposer and the IC die are coupled through thermal interconnects or “nodules.”

First claim

What is claimed is:

1. An integrated circuit (IC) device package, comprising:
an IC die having a plurality of functional blocks and a set of contact pads located on a first surface of the IC die at a plurality of hotspots associated with the plurality of functional blocks, wherein a spacing between a contact pad of the set of contact pads and a first adjacent contact pad of the set of contact pads is different from a spacing between the contact pad and a second adjacent contact pad of the set of contact pads, wherein the plurality of hotspots are locations on the IC die that have temperatures that are higher than an average temperature of the IC die during operation of the IC die;
a thermally conductive interposer having first and second surfaces, wherein the first surface of the thermally conductive interposer is thermally coupled to each contact pad of the set of contact pads; and
a plurality of wirebond contact pads that are located around a perimeter of the IC die.

2. The package of claim 1 , further comprising:
an underfill material that substantially fills a space between the first surface of the IC die and the first surface of the thermally conductive interposer.

3. The package of claim 1 , wherein the first surface of the thermally conductive interposer has at least one post.

4. The package of claim 1 , wherein the thermally conductive interposer is electrically conductive.

5. The package of claim 1 , wherein the first surface of the thermally conductive interposer is electrically coupled to the set of contact pads.

6. The package of claim 1 , wherein the package is a die-down IC device package.

7. The package of claim 1 , wherein the package is a die-up IC device package.

8. The package of claim 1 , wherein the second surface of the thermally conductive interposer is configured to be coupled to a printed circuit board (PCB).

9. The package of claim 1 , wherein a second surface of the IC die that opposes the first surface of the IC die is coupled to a substrate or a die-attach pad.

10. The package of claim 1 , wherein the plurality of wirebond contact pads is configured to input and/or output signals to and from the IC die.

11. The package of claim 1 , further comprising:
at least one thermally conductive nodule, wherein the first surface of the thermally conductive interposer is coupled to the IC die through the at least one nodule.

12. The package of claim 11 , wherein the at least one nodule is electrically conductive.

13. The package of claim 1 , further comprising:
a heat spreader, where the heat spreader is attached to the second surface of the thermally conductive interposer.

14. The package of claim 13 , wherein the heat spreader is electrically coupled to the second surface of the thermally conductive interposer.

15. The package of claim 1 , further comprising:
a heat slug, wherein the heat slug is attached to the second surface of the thermally conductive interposer.

16. The package of claim 15 , wherein the heat slug is electrically coupled to the second surface of the thermally conductive interposer.

17. The package of claim 15 , wherein the heat slug is configured to be coupled to a printed circuit board (PCB).

18. The package of claim 1 , further comprising:
a thermal interconnect coupled between the first surface of the thermally conductive interposer and the contact pad.

19. The package of claim 18 , wherein the thermal interconnect is a solder ball.

20. The package of claim 18 , wherein the thermal interconnect is a block.

21. The package of claim 18 , wherein the thermal interconnect is a solder bump.

22. The package of claim 1 , further comprising:
a substrate coupled to a second surface of the IC die, wherein the second surface of the IC die opposes the first surface of the IC die;
wherein the set of contact pads is a first set of contact pads, wherein the IC die further comprises a second set of contact pads arranged uniformly, and wherein the second set of contact pads is coupled to the substrate.

23. The package of claim 22 , wherein the second set of contact pads is coupled to the substrate through respective wirebonds.

24. The package of claim 22 , wherein the first set of contact pads is located in a central portion of the first surface of the IC die, and
wherein the second set of contact pads is located along a periphery of the first surface of the IC die.

Assignees

• Khan Rezaur Rahman
• Zhao Sam Ziqun
• Broadcom Corp

Inventors

• Khan Rezaur Rahman
• Zhao Sam Ziqun

Classifications

• H10W90/756

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W90/754

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/736

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W90/734

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title