Manufacturing method of semiconductor device

Patent metadata

Field	Value
Publication number	US-9299569-B2
Application number	US-201514801798-A
Country	US
Kind code	B2
Filing date	Jul 16, 2015
Priority date	Jul 28, 2014
Publication date	Mar 29, 2016
Grant date	Mar 29, 2016

Abstract

The present invention improves the performance of a semiconductor device. In a manufacturing method of a semiconductor device, sacrificial oxide films are formed over the side surface of a control gate electrode formed in a memory cell region, the surface of a cap insulating film formed in the memory cell region, and the surface of the part, which remains in a peripheral circuit region, of an insulating film. The step of forming the sacrificial oxide films includes the steps of: oxidizing the side surface of the control gate electrode by a thermal oxidation method; and oxidizing the surface of the cap insulating film and the surface of the part, which remains in the peripheral circuit region, of the insulating film by an ISSG oxidation method.

First claim

What is claimed is:

1. A manufacturing method of a semiconductor device, comprising the steps of:
(a) providing a semiconductor substrate;
(b) forming a first insulating film over a first main surface of said semiconductor substrate in a first region over said first main surface of said semiconductor substrate and in a second region over said first main surface of said semiconductor substrate;
(c) forming a first conductive film comprised of silicon over said first insulating film in said first region and said second region;
(d) forming a second insulating film containing silicon and nitrogen over said first conductive film in said first region and said second region;
(e) patterning said second insulating film and said first conductive film, forming a first gate electrode comprised of said first conductive film in said first region, forming a first gate insulating film comprised of said first insulating film between said first gate electrode and said semiconductor substrate, forming a first cap insulating film comprised of said second insulating film over said first gate electrode, and leaving said second insulating film and said first conductive film in said second region;
(f) oxidizing the side surface of said first gate electrode, the surface of said first cap insulating film, and the surface of the part, which remains in said second region, of said second insulating film, forming a first oxide film over the side surface of said first gate electrode, forming a second oxide film over the surface of said first cap insulating film, and forming a third oxide film over the surface of the part, which remains in said second region, of said second insulating film;
(g) removing said third oxide film and the part, which remains in said second region, of said second insulating film;
(h) after said step (g), removing said first oxide film and said second oxide film; and
(i) after said step (h), patterning the part, which remains in said second region, of said first conductive film, forming a second gate electrode comprised of said first conductive film in said second region, and forming a second gate insulating film comprised of said first insulating film between said second gate electrode and said semiconductor substrate, wherein said step (f) includes the steps of:
(f1) oxidizing the side surface of said first gate electrode by a thermal oxidation method; and
(f2) oxidizing the surface of said first cap insulating film and the surface of the part, which remains in said second region, of said second insulating film by an ISSG oxidation method.

2. A manufacturing method of a semiconductor device according to claim 1 , including the steps of:
(j) after said step (f), forming a resist film so as to cover said first gate electrode, said first cap insulating film, and the part, which remains in said second region, of said second insulating film in said first region and said second region;
(k) patterning said resist film, removing said resist film in said second region, and leaving said resist film in said first region; and
(l) removing the part, which remains in said first region, of said resist film,
wherein at said step (g), after said step (k), said third oxide film and the part, which remains in said second region, of said second insulating film are removed,
wherein at said step (l), after said step (g), the part, which remains in said first region, of said resist film is removed, and
wherein at said step (h), after said step ( 1 ), said first oxide film and said second oxide film are removed.

3. A manufacturing method of a semiconductor device according to claim 1 , wherein, at said step (f2), after said step (f1), the surface of said first cap insulating film and the surface of the part, which remains in said second region, of said second insulating film are oxidized by said ISSG oxidation method.

4. A manufacturing method of a semiconductor device according to claim 1 ,
wherein at said step (f2), the side surface of said first gate electrode is oxidized by said ISSG oxidation method, and
wherein at said step (f1), after said step (f2), the side surface of said first gate electrode is oxidized by said thermal oxidation method.

5. A manufacturing method of a semiconductor device according to claim 1 ,
wherein said step (i) includes the steps of:
(i1) forming a third insulating film having a charge accumulation section therein over said first main surface of said semiconductor substrate, the side surface of said first gate electrode, and the surface of said first cap insulating film, in said first region;
(i2) forming a second conductive film over said third insulating film;
(i3) leaving said second conductive film and forming a third gate electrode over the sidewall of said first gate electrode via said third insulating film, by etching back said second conductive film; and
(i4) removing the part, which is not covered with said third gate electrode, of said third insulating film and leaving said third insulating film between said third gate electrode and said semiconductor substrate and between said first gate electrode and said third gate electrode.

6. A manufacturing method of a semiconductor device according to claim 5 ,
wherein at said step (a), said semiconductor substrate having a first semiconductor region of a first conductive type formed over said first main surface in said first region is provided,
wherein at said step (b), said first insulating film is formed over said first semiconductor region in said first region,
wherein at said step (c), said first conductive film is formed over the part, which is formed over said first semiconductor region, of said first insulating film,
wherein at said step (d), said second insulating film is formed over the part, which is formed over said first semiconductor region via said first insulating film, of said first conductive film,
wherein at said step (e), said first gate electrode comprising the part, which is formed over said first semiconductor region via said first insulating film, of said first conductive film is formed,
wherein at said step (i3), said second conductive film remains and said third gate electrode is formed over a first sidewall that is the sidewall on a first side of said first gate electrode via said third insulating film, by etching back said second conductive film,
said manufacturing method of said semiconductor device further including a step of:
(m) after said step (f), introducing impurities of a second conductive type opposite to said first conductive type into said first semiconductor region by an ion implantation method with said first cap insulating film and said first gate electrode used as masks and forming a second semiconductor region of said second conductive type at the upper layer part of the part, which is located on said first side of said first gate electrode, of said first semiconductor region in plan view,
wherein at said step (h), after said step (m), said first oxide film and said second oxide film are removed.

7. A manufacturing method of a semiconductor device according to claim 6 , wherein, at said step (m), said second semiconductor region is formed so as to be separated from said first gate electrode in plan view.

8. A manufacturing method of a semiconductor device according to claim 6 , including a step of:
(n) after said step (m), in said first region, introducing impurities of said second conductive type into said first semiconductor region with said first cap insulating film, said first gate electrode, and said third gate electrode used as masks, forming a third semiconductor region of said second conductive type at the upper layer part of the part, which is located on the side opposite to said first gate electrode via said th

Assignees

• Renesas Electronics Corp

Inventors

• Kawashima Yoshiyuki
• Saito Kentaro
• Chakihara Hiraku

Classifications

• H10P14/69433

  the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz · CPC title

• H10P14/69215

  the material being a silicon oxide, e.g. SiO2 · CPC title

• H10D64/01

  Manufacture or treatment · CPC title

• H10D30/696

  having at least one additional gate, e.g. program gate, erase gate or select gate · CPC title

• H10D30/0413

  of FETs having charge-trapping gate insulators, e.g. MNOS transistors · CPC title