Semiconductor electronic components and circuits

Patent metadata

Field	Value
Publication number	US-9293458-B2
Application number	US-201314058089-A
Country	US
Kind code	B2
Filing date	Oct 18, 2013
Priority date	Feb 5, 2010
Publication date	Mar 22, 2016
Grant date	Mar 22, 2016

Abstract

An electronic component includes a high-voltage depletion-mode transistor and a low-voltage enhancement-mode transistor both encased in a single package. A source electrode of the high-voltage depletion-mode transistor is electrically connected to a drain electrode of the low-voltage enhancement-mode transistor, a drain electrode of the high-voltage depletion-mode transistor is electrically connected to a drain lead of the single package, a gate electrode of the low-voltage enhancement-mode transistor is electrically connected to a gate lead of the single package, a gate electrode of the high-voltage depletion-mode transistor is electrically connected to an additional lead of the single package, and a source electrode of the low-voltage enhancement-mode transistor is electrically connected to a conductive structural portion of the single package.

First claim

What is claimed is:

1. An electronic component, comprising:
a depletion-mode transistor;
an enhancement-mode transistor;
a resistor; and
a single package enclosing the depletion-mode transistor, the enhancement-mode transistor, and the resistor, the single package including
a package base formed of an electrically conducting material,
a source lead directly electrically connected to the package base, and
a gate lead and a drain lead, each of which is electrically isolated from the package base,

wherein the depletion-mode transistor, the enhancement-mode transistor, and the resistor are each provided on and supported by the package base,
wherein a source electrode of the depletion-mode transistor is directly electrically connected to a drain electrode of the enhancement-mode transistor, and a drain electrode of the depletion-mode transistor is directly electrically connected to the drain lead, thereby causing the drain electrode of the depletion-mode transistor to be electrically isolated from the package base,
wherein a first end of the resistor is directly electrically connected to a gate electrode of the depletion-mode transistor, and a second end of the resistor is directly electrically connected to the package base,
wherein a gate electrode of the enhancement-mode transistor is directly electrically connected to the gate lead, thereby causing the gate electrode of the enhancement-mode transistor to be electrically isolated from the package base, and
wherein a source electrode of the enhancement-mode transistor is directly electrically connected to the package base, thereby causing the source electrode of the enhancement-mode transistor and the second end of the resistor to be electrically connected to each other and to the source lead.

2. The electronic component of claim 1 , wherein the depletion-mode transistor and the resistor are on a common substrate.

3. The electronic component of claim 2 , wherein the depletion-mode transistor and the resistor comprise a same semiconductor layer structure.

4. The electronic component of claim 1 , wherein the depletion-mode transistor and the resistor both comprise III-N semiconductor materials.

5. The electronic component of claim 1 , wherein the depletion-mode transistor comprises a semiconductor layer structure, and the resistor comprises a conducting or semiconducting layer which is on the semiconductor layer structure.

6. The electronic component of claim 5 , wherein the depletion-mode transistor is a III-Nitride transistor.

7. The electronic component of claim 1 , wherein the resistor has a resistance of between about 100 Ohms and 100 kOhms.

8. The electronic component of claim 1 , wherein the enhancement-mode transistor is a silicon-based transistor.

9. The electronic component of claim 1 , wherein the enhancement-mode transistor is a III-Nitride transistor.

10. The electronic component of claim 1 , wherein the depletion-mode transistor is a III-Nitride transistor.

11. The electronic component of claim 1 , wherein the depletion-mode transistor is a high-voltage transistor, and the enhancement-mode transistor is a low-voltage transistor.

12. The electronic component of claim 1 , wherein the resistor comprises a III-N semiconductor material including a two-dimensional electron gas, and the first and second ends of the resistor contact the two-dimensional electron gas.

13. The electronic component of claim 1 , wherein the single package further comprises a case formed of an insulating material.

14. The electronic component of claim 13 , wherein the single package includes a gate lead and a drain lead, the case includes a plurality of sides, and the gate lead and drain lead are on a first side of the plurality of sides.

Assignees

• Transphorm Inc

Inventors

• Parikh Primit
• Honea James
• Blake Jr Carl C
• Coffie Robert
• Wu Yifeng
• Mishra Umesh

Classifications

• H10W90/759

  between a chip and a laterally-adjacent discrete passive device · CPC title

• H10W90/756

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W90/753

  between laterally-adjacent chips · CPC title

• H10W44/601

  Capacitive arrangements (H10W44/20 takes precedence) · CPC title

• H10W44/401

  Resistive arrangements (H10W44/20, H10W42/80 take precedence) · CPC title