Semiconductor device package and method

Patent metadata

Field	Value
Publication number	US-9287191-B2
Application number	US-201113271766-A
Country	US
Kind code	B2
Filing date	Oct 12, 2011
Priority date	Oct 12, 2011
Publication date	Mar 15, 2016
Grant date	Mar 15, 2016

Abstract

An embodiment is a structure. The structure comprises a substrate, a chip, and a reinforcement component. The substrate has a first surface, and the first surface comprises depressions. The chip is over and attached to the first surface of the substrate. The reinforcement component is over a first area of the first surface of the substrate. The first area is not under the chip. The reinforcement component has a portion disposed in at least some of the depressions in the first area.

First claim

What is claimed is:

1. A structure comprising:
a substrate having a first surface, separate depressions extending into the substrate from the first surface of the substrate;
a chip over and attached to the first surface of the substrate; and
a reinforcement component over a first area of the first surface of the substrate, the first area not being under the chip, the reinforcement component having a portion disposed in at least some of the depressions in the first area, wherein the reinforcement component comprises a lid and an adhesive, the lid having a first portion over the chip and a second portion over the first area of the first surface of the substrate, the adhesive being between the second portion of the lid and the first surface of the substrate, the adhesive being disposed in the at least some of the depressions in the first area.

2. The structure of claim 1 , wherein the substrate comprises a layer and an underlying substrate, the layer being over the underlying substrate, the depressions being openings through the layer.

3. The structure of claim 1 , wherein the depressions are recesses in the first surface of the substrate.

4. The structure of claim 1 further comprising an underfill material between the chip and the substrate, the underfill material being disposed in a plurality of the depressions in a second area of the first surface of the substrate, the second area being under the chip.

5. The structure of claim 1 , wherein the second portion of the lid comprises lid depressions, the adhesive being disposed in at least some of the lid depressions.

6. The structure of claim 1 further comprising a thermal interface material between a surface of the chip and the first portion of the lid, the first portion of the lid comprising lid depressions, the thermal interface material being disposed in at least some of the lid depressions.

7. The structure of claim 1 , wherein an active surface of the chip is facing the first surface of the substrate, external electrical connectors being directly attached to the active surface and the first surface, the external electrical connectors mechanically and electrically coupling the chip to the substrate.

8. The structure of claim 1 , wherein the reinforcement component at least laterally encircles the chip over the first area.

9. A structure comprising:
a substrate having a first surface, separate depressions extending into the substrate from the first surface of the substrate;
a chip over and attached to the first surface of the substrate; and
a reinforcement component over a first area of the first surface of the substrate, the first area not being under the chip, the reinforcement component having a portion disposed in at least some of the depressions in the first area, wherein the reinforcement component comprises a ring and an adhesive, the ring being around the chip and over the first area, the adhesive being between the ring and the first surface of the substrate, the adhesive being disposed in the at least some of the depressions in the first area.

10. The structure of claim 9 , wherein the ring comprises ring depressions, the adhesive being disposed in at least some of the ring depressions.

11. The structure of claim 9 , wherein the portion of the reinforcement component is disposed in a plurality of the depressions in the first area.

12. A structure comprising:
a substrate having depressions in a top surface;
a chip attached to the top surface by external electrical connectors directly attached between the chip and the top surface of the substrate;
an underfill material between the top surface of the substrate and the chip, the underfill material being around the external electrical connectors, the underfill material being in at least some of the depressions in a first area of the top surface of the substrate, the first area underlying the chip; and
a component selected from the group consisting essentially of a lid and a first adhesive, a ring and a second adhesive, and a molding compound, the component being on the top surface of the substrate and having a portion disposed in a plurality of the depressions in a second area of the top surface of the substrate, the second area not underlying the chip.

13. The structure of claim 12 , wherein the component is the lid and the first adhesive, the lid being over the chip, the lid having first lid depressions in a first portion of the lid overlying the chip and having second lid depressions in a second portion of the lid overlying the first area, a thermal interface material being between the chip and the first portion and disposed in at least some of the first lid depressions, the first adhesive being disposed in at least some of the second lid depressions and being disposed in the plurality of the depressions in the second area.

14. The structure of claim 12 , wherein the component is the ring and the second adhesive, the ring being around the chip, the ring having ring depressions, the second adhesive being disposed in at least some of the ring depressions and being disposed in the plurality of the depressions in the second area.

15. The structure of claim 12 , wherein the component is the molding compound, the molding compound being in the plurality of the depressions in the second area.

16. The structure of claim 12 , wherein the substrate comprises a layer and an underlying substrate, the layer being over the underlying substrate, the depressions being openings through the layer.

17. The structure of claim 12 , wherein the component at least laterally surrounds the chip over the second area of the top surface of the substrate.

18. A structure comprising:
a substrate having a top side, the top side having depressions, the top side having a chip-attach area and a periphery area, the periphery area being distinct from the chip-attach area;
a chip having an active side, external electrical connectors attaching the active side of the chip to the chip-attach area of the top side of the substrate, the active side of the chip facing the top side of the substrate, the periphery area not being under the chip;
an underfill material disposed between active side of the chip and the chip-attach area of the top side of the substrate, the underfill material being disposed around the external electrical connectors and disposed in a first plurality of the depression in the chip-attach area of the top side of the substrate; and
a reinforcement component at least laterally encircling the chip and over the periphery area of the top side of the substrate, the reinforcement component having a portion disposed in a second plurality of the depressions in the periphery area of the top side of the substrate.

Assignees

• Liu Hao-Juin
• Chuang Chita
• Kuo Chen-Cheng
• Chen Chen-Shien
• Taiwan Semiconductor Mfg

Inventors

• Liu Hao-Juin
• Chuang Chita
• Kuo Chen-Cheng
• Chen Chen-Shien

Classifications

• H10W90/736

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W90/734

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title

• H10W72/07236

  Soldering or alloying · CPC title