Method for fabricating multi-chip module with multi-level interposer

Patent metadata

Field	Value
Publication number	US-9281268-B2
Application number	US-201213517591-A
Country	US
Kind code	B2
Filing date	Jun 13, 2012
Priority date	Mar 9, 2010
Publication date	Mar 8, 2016
Grant date	Mar 8, 2016

Abstract

A multi-level interposer plate and a multi-chip module (MCM) that includes the multi-level interposer plate are described. First surfaces and second surfaces in different regions of the multi-level interposer plate have associated, different thicknesses. Moreover, first micro-spring connectors and second micro-spring connectors are respectively disposed on the first surfaces and the second surfaces. In the MCM, a given one of the first surfaces of the multi-level interposer plate faces a bridge chip in a first layer in an array of chips in the MCM so that first connectors, disposed on the bridge chip, mechanically and electrically couple to the first micro-spring connectors. Similarly, a given one of the second surfaces of the multi-level interposer plate faces an island chip in a second layer in the array of chips so that second connectors, disposed on the island chip, mechanically and electrically couple to the second micro-spring connectors.

First claim

What is claimed is:

1. A method for fabricating a multi-level interposer plate for use in an multi-chip module, comprising:
defining first micro-spring connectors on first surfaces of first substrates, wherein the first substrates have a first thickness;
defining second micro-spring connectors on second surfaces of second substrates, wherein the second substrates have a second thickness, wherein the second thickness is greater than the first thickness;
attaching the first substrates and the second substrates to a mechanical alignment plate; and
mechanically coupling the first substrates and the second substrates to a base plate, thereby fabricating the multi-level interposer plate.

2. The method of claim 1 , wherein the method further includes detaching the mechanical alignment plate.

3. The method of claim 1 , wherein a micro-spring connector on a substrate is fabricated by:
depositing a metal layer on the substrate; and
forming a portion of the metal layer into the micro-spring connector.

4. The method of claim 3 , wherein depositing the metal layer on the substrate comprises:
depositing a stress-engineered metal layer on the substrate; and
depositing a titanium release layer on the stress-engineered metal layer.

5. The method of claim 4 , wherein forming the portion of the metal layer into the micro-spring connector comprises:
depositing a photoresist on the metal layer;
developing a region of the photoresist proximate to the portion of the metal layer;
performing at least one etching operation to expose the portion of the metal layer; and
removing the titanium release layer in the portion of the metal layer to release the stress-engineered metal layer in the portion of the metal layer, the released stress-engineered metal layer in the portion of the metal layer forming the micro-spring connector.

6. The method of claim 5 , wherein the method further comprises:
depositing a conductive material on the released portion of the stress-engineered metal layer.

7. The method of claim 3 , wherein the method further comprises:
fabricating one or more recessed regions in the substrate;
wherein depositing the stress-engineered metal layer on the substrate comprises depositing the stress engineered metal layer in the recessed region in the substrate; and
wherein forming the portion of the metal layer into the micro-spring connector comprises forming a portion of the metal layer in the recessed region into the micro-spring connector.

8. The method of claim 3 , wherein the method further comprises:
depositing a dielectric layer on the substrate; and
depositing the metal layer on the dielectric layer.

9. The method of claim 3 , wherein the method further comprises:
fabricating one or more thru-substrate vias in the substrate.

Assignees

• Chow Eugene M
• Cunningham John E
• Mitchell James G
• Shubin Ivan
• Oracle Int Corp

Inventors

• Chow Eugene M
• Cunningham John E
• Mitchell James G
• Shubin Ivan

Classifications

• H10W70/644

  Elastic or compliant interconnections, e.g. springs, cantilevers or elastic pads · CPC title

• H10W90/293

  characterised by non-galvanic coupling between the chips, e.g. capacitive coupling · CPC title

• H10W70/682

  comprising holes having chips therein · CPC title

• H10W46/301

  for alignment · CPC title

• H10W46/601

  for use after dicing · CPC title