Semiconductor memory apparatus
US-9214220-B1 · Dec 15, 2015 · US
US9281023B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9281023-B2 |
| Application number | US-201414146793-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 3, 2014 |
| Priority date | Jan 3, 2014 |
| Publication date | Mar 8, 2016 |
| Grant date | Mar 8, 2016 |
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Disclosed are single-ended sensing circuits. Each of the sensing circuits comprises at least a sense amplifier connected to a sense node, an isolation field effect transistor (FET) connected in series between the sense node and a signal line node, and a pre-charged device connected to the sense node. In order to achieve a relatively fast pre-charge of both the sense and signal line nodes and to also achieve a relatively fast and accurate sense of the sense node, the single-ended circuits further incorporate a variable reference voltage generator connected to the gate of the isolation FET for selectively applying different reference voltages to the gate during pre-charging and sensing operations, respectively, and/or a second pre-charge device connected to the signal line node for facilitating pre-charging of that signal line node.
Opening claim text (preview).
What is claimed is: 1. A sensing circuit comprising: a first node; a second node electrically connected to a signal line; an isolation field effect transistor comprising a source electrically connected to said second node, a drain electrically connected to said first node, and a gate; a variable reference voltage generator electrically connected to said gate; a pre-charge device electrically connected to said first node; and a sense amplifier comprising: an input receiving an input signal from said first node; and an output outputting an output signal, said variable reference voltage generator applying a first reference voltage to said gate and said pre-charge device turning on, during a pre-charging mode, such that said first node is pre-charged to a first pre-charge voltage, said second node is pre-charged to a second pre-charge voltage that is lower than said first pre-charge voltage, said input signal becomes a HIGH input signal and said output signal becomes a LOW output signal, and said variable reference voltage generator applying a second reference voltage that is less than said first reference voltage to said gate, during a sensing mode, such that, upon sensing a voltage decrease at said first node, said sense amplifier switches said LOW output signal to a HIGH output signal. 2. The sensing circuit of claim 1 , said second pre-charge voltage being approximately said first reference voltage minus a first threshold voltage of said isolation field effect transistor and further being less than a second threshold voltage of said sense amplifier. 3. The sensing circuit of claim 2 , said sense amplifier sensing said voltage decrease at said first node as a corresponding voltage decrease occurs at said second node from said second pre-charge voltage to below said second reference voltage minus said first threshold voltage. 4. The sensing circuit of claim 1 , said sense amplifier comprising any one of a source follower and a Schmitt trigger comparator. 5. The sensing circuit of claim 1 , further comprising a reset device electrically connected to said second node, said reset device being turned off, during said sensing mode and said pre-charging mode, and said reset device being turned on, during a reset mode, to pull said second node to ground. 6. The sensing circuit of claim 1 , further comprising a multiplexer receiving said first reference voltage and said second reference voltage from said variable reference voltage generator, receiving said output signal from said output, applying said first reference voltage to said gate when said output signal is said HIGH output signal, and applying said second reference voltage to said gate when said output signal is said LOW output signal. 7. A sensing circuit comprising: a first node; a second node electrically connected to a signal line; an isolation field effect transistor comprising a source electrically connected to said second node, a drain electrically connected to said first node, and a gate; a reference voltage generator electrically connected to said gate; a first pre-charge device electrically connected to said first node; a second pre-charge device electrically connected to said second node; and a sense amplifier comprising: an input receiving an input signal from said first node; and an output outputting an output signal, said output being electrically connected to said second pre-charge device, said reference voltage generator applying a reference voltage to said gate and said first pre-charge device and said second pre-charge device each turning on, during a pre-charging mode, such that said first node is pre-charged to a first pre-charge voltage, said second node is pre-charged to a second pre-charge voltage that is lower than said first pre-charge voltage, said input signal becomes a HIGH input signal and said output signal becomes a LOW output signal, said second pre-charge device automatically turning off, during said pre-charging mode, when said output signal at said output becomes said LOW output signal, and said reference voltage generator applying said reference voltage to said gate, during a sensing mode, such that, upon sensing a voltage decrease at said first node, said sense amplifier switches said LOW output signal to a HIGH output signal. 8. The sensing circuit of claim 7 , said second pre-charge voltage being approximately said reference voltage minus a first threshold voltage of said isolation field effect transistor and further being less than a second threshold voltage of said sense amplifier. 9. The sensing circuit of claim 8 , said sense amplifier sensing said voltage decrease at said first node as a corresponding voltage decrease occurs at said second node from said second pre-charge voltage to below said reference voltage minus said first threshold voltage. 10. The sensing circuit of claim 8 , said second pre-charge device comprising: a p-type field effect transistor and an n-type field effect transistor electrically connected in series between a power supply and said second node, said output of said sense amplifier controlling said n-type field effect transistor. 11. The sensing circuit of claim 8 , said second pre-charge device comprising: a first p-type field effect transistor and a second p-type field effect transistor electrically connected in series between a power supply and said second node; and a third p-type field effect transistor electrically connected to said power supply, said output of said sense amplifier controlling said third p-type field effect transistor and a drain voltage of said third p-type field effect transistor controlling said second p-type field effect transistor. 12. The sensing circuit of claim 8 , said sense amplifier comprising any one of a source follower and a Schmitt trigger comparator. 13. The sensing circuit of claim 8 , further comprising a reset device electrically connected to said second node, said reset device being turned off, during said sensing mode and said pre-charging mode, and said reset device being turned on, during a reset mode, to pull said second node to ground. 14. A sensing circuit comprising: a first node; a second node electrically connected to a signal line; an isolation field effect transistor comprising a source electrically connected to said second node, a drain electrically connected to said first node, and a gate; a variable reference voltage generator electrically connected to said gate; a first pre-charge device electrically connected to said first node; a second pre-charge device electrically connected to said second node; and a sense amplifier comprising: an input receiving an input signal from said first node; and an output outputting an output signal, said output being electrically connected to said second pre-charge device, said variable reference voltage generator applying a first reference voltage to said gate and said first pre-charge device and said second pre-charge device each turning on, during a pre-charging mode, such that said first node is pre-charged to a first pre-charge voltage, said second node is pre-charged to a second pre-charge voltage that is lower than said first pre-charge voltage, said input signal becomes a HIGH input signal and said output signal becomes a LOW output signal, said second pre-charge device automatically turning off, during said pre-charging mode, when said output signal at said output becomes said LOW output signal, and said variable reference voltage generator applying a second reference voltage that is less than said first reference voltage to said gate, during a sensing mode, such that, upon sens
Single-ended amplifiers · CPC title
Control thereof · CPC title
Isolation gates, i.e. gates coupling bit lines to the sense amplifier · CPC title
using semiconductor elements · CPC title
Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines · CPC title
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