Method and systems for energy efficiency and energy conservation including on-off keying for power control

Patent metadata

Field	Value
Publication number	US-9280190-B2
Application number	US-201113333759-A
Country	US
Kind code	B2
Filing date	Dec 21, 2011
Priority date	Dec 21, 2011
Publication date	Mar 8, 2016
Grant date	Mar 8, 2016

Abstract

Systems and a method for controlling power of a device with power management software are described. In one embodiment, a computer implemented method initiates power control having ON-OFF keying to control power consumption of a device for energy efficiency and energy conservation. An ON-OFF period of the ON-OFF keying for the device is computed. The method sets a target frequency, a target supply voltage, and a power gate control for the device based on the ON-OFF keying.

First claim

What is claimed is:

1. A computer-implemented method, comprising:
selecting an on-off modulation from a group of voltage frequency scaling, frequency only scaling, and on-off modulation based on voltage and frequency conditions, an effective target frequency, and input from at least one monitor;
initiating power control having ON-OFF modulation between ON and OFF conditions for power gates of a device to control power consumption of the device for energy efficiency and energy conservation;
computing a physical frequency, a supply voltage, and an ON period and an OFF period of the ON-OFF modulation for the device; and
based on the computed ON period and OFF period of the ON-OFF modulation, setting a target frequency, a target supply voltage, and a power gate control for the device.

2. The computer-implemented method of claim 1 , wherein the power gate control comprises one or more switches to control an ON condition and an OFF condition for one or more blocks of the device.

3. The computer-implemented method of claim 1 , further comprising:
initiating power control with power control software; and
computing the target frequency for the device based on one or more inputs.

4. The computer-implemented method of claim 1 , wherein power control software to select ON-OFF modulation for a minimum voltage condition (Vmin) and to select a voltage frequency scaling for voltages greater than Vmin.

5. The computer-implemented method of claim 1 , wherein the at least one monitor includes silicon age monitors.

6. The computer-implemented method of claim 1 , wherein the at least one monitor includes a workload monitor.

7. A processor, comprising:
one or more processing elements to execute instructions of power control software to provide power control for energy efficiency and energy conservation; and
a power control block comprising,
one or more blocks under power control of the power control software to select an on-off modulation from a group of voltage frequency scaling, frequency only scaling, and on-off modulation based on voltage and frequency conditions, an effective target frequency, and input from at least one monitor;
one or more power gates coupled to the one or more blocks, the one or more power gates to control an ON condition and an OFF condition for the one or more blocks of the device, wherein at least one processing element is configured to execute instructions of the power control software to initiate ON-OFF modulation between ON and OFF conditions for power gates to control power consumption of the one or more blocks, to compute an ON period and an OFF period of the ON-OFF modulation for the one or more blocks, and, based on the ON-OFF modulation, set a target operating condition including a target frequency and a target supply voltage and a power gate control for the one or more blocks.

8. The processor of claim 7 , wherein at least one processing element is further configured to execute instructions of the power control software to compute the target operating condition including a target frequency for the power control block based on one or more inputs.

9. The processor of claim 7 , wherein the power control block further comprises one or more voltage regulators to receive a voltage control input from the power control software and to provide controlled supply voltages for the one or more blocks.

10. The processor of claim 7 , wherein the at least one processing element is further configured to execute instructions of the power control software to compute an actual operating condition including an actual frequency and an actual supply voltage.

11. The processor of claim 7 , the power control block further comprises one or more clock generators to receive a frequency control input from the power control software and to provide one or more controlled frequencies of clock signals for the one or more blocks, wherein the ON-OFF modulation reduces power consumption of the one or more blocks by alternating between the ON condition and the OFF condition, wherein the one or more blocks while in the OFF condition eliminates or at least reduces leakage power.

12. A system, comprising:
a microcontroller to execute instructions of power control software to provide power control for energy efficiency and energy conservation; and
a device coupled to the microcontroller, the device comprises,
one or more blocks under power control of the power control software to select an on-off modulation from a group of voltage frequency scaling, frequency only scaling, and on-off modulation based on voltage and frequency conditions, an effective target frequency, and input from at least one monitor;
one or more power gates coupled to the one or more blocks, the one or more power gates to control an ON condition and an OFF condition for the one or more blocks of the device, wherein the microcontroller is configured to execute instructions of the power control software to initiate ON-OFF modulation between ON and OFF conditions for power gates of the device to control power consumption of the device, to compute an ON period and an OFF period of the ON-OFF modulation for the device, and, based on the ON-OFF modulation, set a target operating condition including a target frequency and a target supply voltage and a power gate control for the one or more blocks.

13. The system of claim 12 , wherein the microcontroller is further configured to execute instructions of the power control software to compute the target operating condition including a target frequency for the device based on one or more inputs.

14. The system of claim 12 , wherein the device further comprises one or more voltage regulators to receive a voltage control input from the power control software and to provide controlled supply voltages for the device.

15. The system of claim 12 , wherein the microcontroller is further configured to execute instructions of the power control software to compute an actual operating condition including an actual frequency and an actual supply voltage.

16. The system of claim 12 , wherein the device further comprises one or more clock generators to receive a frequency control input from the power control software and to provide one or more controlled frequencies of clock signals for the one or more blocks.

Assignees

• Nasrullah Jawad
• Kwan Kelvin
• Ditzel David Roger
• Svilan Vjekoslav
• Intel Corp

Inventors

• Nasrullah Jawad
• Kwan Kelvin
• Ditzel David Roger
• Svilan Vjekoslav

Classifications

• G06F1/3203 Primary

  Power management, i.e. event-based initiation of a power-saving mode · CPC title

• G06F1/3231

  Monitoring the presence, absence or movement of users · CPC title

• Y02B60/1285

  Cross-Sectional Technologies · mapped topic

• G06F1/324

  by lowering clock frequency · CPC title

• G06F1/26 Primary

  Power supply means, e.g. regulation thereof (for memories G11C) · CPC title