Method of creating spiral inductor having high Q value

US9269485B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9269485-B2
Application numberUS-201113102531-A
CountryUS
Kind codeB2
Filing dateMay 6, 2011
Priority dateNov 29, 2007
Publication dateFeb 23, 2016
Grant dateFeb 23, 2016

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A method for fabricating an inductor structure having an increased quality factor (Q) is provided. In one embodiment, a substrate is provided and a plurality of metal layers are formed on the substrate. A spirally patterned conductor layer is formed over and in the substrate and in the metal layers to produce a planar spiral inductor. A via hole is formed over and in the substrate and in the metal layers within the spirally patterned conductor layer, the via hole being formed by a through silicon via (TSV) process. Thereafter, the via hole is filled with a core layer, wherein the core layer extends from a bottom surface of the substrate to a top surface of the metal layers.

First claim

Opening claim text (preview).

What is claimed is: 1. An inductor structure, comprising: a silicon wafer; a dielectric layer formed on the silicon wafer; a spirally patterned conductor layer formed over and in the silicon wafer and in the dielectric layer to form metal-containing layers, the spirally patterned conductor layer forming a planar spiral inductor; a via hole formed over and in the silicon wafer and in the metal-containing layers within the spirally patterned conductor layer, wherein the via hole is formed by a through silicon via (TSV) process and is formed through the silicon wafer; and a core layer filling the via hole, wherein the core layer extends from a bottom surface of the silicon wafer to a top surface of the metal-containing layers, and the core layer is insulated from the spirally patterned conductor layer and surrounded by the spirally patterned conductor layer. 2. The inductor structure of claim 1 , wherein the core layer is made of a magnetic material. 3. The inductor structure of claim 2 , wherein the magnetic material comprises iron, nickel, MnZn ferrite, NiZn ferrite, NiFe ferrite, NiCuZn alloy, other ferrites, mumetals, and mumetal alloys. 4. The inductor structure of claim 1 , wherein the core layer comprises a plurality of individual members divided and insulated from each other.

Assignees

Inventors

Classifications

  • Bond pads, in general · CPC title

  • Inductive arrangements (H10W44/20 takes precedence) · CPC title

  • Inductive arrangements or effects of, or between, wiring layers · CPC title

  • Inductors · CPC title

  • Details of via holes for interconnecting the layers · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9269485B2 cover?
A method for fabricating an inductor structure having an increased quality factor (Q) is provided. In one embodiment, a substrate is provided and a plurality of metal layers are formed on the substrate. A spirally patterned conductor layer is formed over and in the substrate and in the metal layers to produce a planar spiral inductor. A via hole is formed over and in the substrate and in the me…
Who is the assignee on this patent?
Chang Shih-Cheng, Lee Hui-Yu, Taiwan Semiconductor Mfg Co Ltd
What technology area does this patent fall under?
Primary CPC classification H01F17/0013. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 23 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).