Dielectric materials, methods of forming subassemblies therefrom, and the subassemblies formed therewith

Patent metadata

Field	Value
Publication number	US-9265160-B2
Application number	US-201314099207-A
Country	US
Kind code	B2
Filing date	Dec 6, 2013
Priority date	Aug 8, 2006
Publication date	Feb 16, 2016
Grant date	Feb 16, 2016

Abstract

A circuit subassembly, comprising a dielectric layer formed from a dielectric composition comprising, based on the total volume of the composition: about 15 to about 65 volume percent of a dielectric filler; and about 35 to about 85 volume percent of a thermosetting composition comprising: a poly(arylene ether), and a carboxy-functionalized polybutadiene or polyisoprene polymer.

First claim

What is claimed is:

1. A method for the manufacture of a circuit subassembly, comprising:
providing a core comprising
a core dielectric substrate layer having a first surface and an opposite second surface, wherein the composition of said core dielectric substrate layer is based on 1, 2-polybutadiene, polytetrafluoroethylene, or a liquid crystal polymer; and
a first core wiring layer disposed on the first surface of the core dielectric substrate layer; and

laminating a first dielectric layer, comprising at least 15 weight percent of a dielectric filler, onto the first core wiring layer, wherein the first dielectric layer is formed from a dielectric composition comprising, based on the total volume of the composition:
about 15 to about 65 volume percent of the dielectric filler; and
about 35 to about 85 volume percent of a thermosetting composition comprising:
an unmodified poly(arylene ether), and
a carboxy-functionalized polybutadiene or polyisoprene polymer.

2. The method of claim 1 , wherein the core further comprises a second core wiring layer disposed on the second surface of the core dielectric substrate layer, and the method further comprises laminating a second dielectric layer on the second core wiring layer, wherein the second dielectric buildup layer is formed from said dielectric composition.

3. The method of claim 2 , wherein the first and the second dielectric layers are laminated onto the first and second wiring layers simultaneously.

4. The method of claim 2 , further comprising metallizing the laminated first dielectric layer.

5. The method of claim 1 , wherein the composition of the core dielectric substrate layer is based on a 1,2-polybutadiene resin.

6. The method of claim 1 , wherein the composition of the core dielectric substrate layer is based on polytetrafluoroethylene.

7. The method of claim 1 , wherein the composition of the core dielectric substrate layer is based on liquid crystal polymer.

8. The method of claim 1 , wherein the dielectric filler in present in an amount of about 30 to about 60 volume percent of the dielectric composition and the thermosetting composition comprises 30 to 50 weight percent of an unmodified poly(arylene ether), 20 to 40 weight percent of a carboxy-functionalized polybutadiene or polyisoprene polymer, and 20 to 40 weight percent of an elastomeric block copolymer.

9. The method of claim 1 , wherein the dielectric filler comprises at least one of silica, titania, magnesium hydroxide, strontium titanate, barium titanate, Ba 2 Ti 9 O 20 , boron nitride, aluminum nitride, and alumina.

10. The method of claim 1 , wherein the dielectric composition further comprises an additional poly(arylene ether) that is carboxy-functionalized.

11. The method of claim 10 , wherein the additional poly(arylene ether) is the reaction product of a poly(arylene ether) and a cyclic anhydride.

12. The method of claim 1 , wherein the dielectric composition comprises about 20 to about 89 wt % of the poly(arylene ether) and about 1 to about 80 wt % of the polybutadiene or polyisoprene polymer, each based on the combined weight of the poly(arylene ether) and the polybutadiene or polyisoprene polymer.

13. The method of claim 8 , wherein the elastomeric block copolymer is styrene-butadiene diblock copolymer, styrene-butadiene-styrene triblock copolymer, styrene-isoprene diblock copolymer, styrene-isoprene-styrene triblock copolymer, styrene-(ethylene-butylene)-styrene triblock copolymer, styrene-(ethylene-propylene)-styrene triblock copolymer, styrene-(ethylene-butylene) diblock copolymer, or a combination comprising at least one of the foregoing copolymers.

14. The method of claim 8 , wherein the block copolymer is a styrene-butadiene diblock copolymer, styrene-butadiene-styrene triblock copolymer, or a combination comprising at least one of the foregoing copolymers.

15. The method of claim 8 , wherein the block copolymer is a combination of styrene-butadiene diblock copolymer and styrene-butadiene-styrene triblock copolymer.

16. The method of claim 1 , wherein the thickness of the core dielectric substrate layer is 25 to 400 micrometers.

17. The method of claim 16 , wherein the thickness of the first dielectric layer is 75 to about 400 micrometers.

18. A method for the manufacture of a circuit subassembly, comprising: providing a core comprising a core dielectric substrate layer having a first surface and an opposite second surface, wherein the composition of said core dielectric substrate layer is based on 1,2-polybutadiene, polytetrafluoroethylene, or a liquid crystal polymer; and a first core wiring layer disposed on the first surface of the core dielectric substrate layer; and laminating a first dielectric layer, comprising at least 15 weight percent of a dielectric filler, onto the first core wiring layer, wherein the dielectric layer is formed from a dielectric composition comprising, based on the total volume of the composition: about 15 to about 65 volume percent of the dielectric filler; and about 35 to about 85 volume percent of a thermosetting composition comprising: an unmodified poly(arylene ether), and a carboxy-functionalized polybutadiene or polyisoprene polymer; wherein the thickness of the first dielectric layer is 75 to about 600 micrometers.

Assignees

• Rogers Corp

Inventors

• Paul Sankar
• Kennedy Scott D
• Baars Dirk M

Classifications

• H05K3/462

  characterized by laminating only or mainly similar double-sided circuit boards · CPC title

• H05K3/4641

  having integrally laminated metal sheets or special power cores · CPC title

• C08L71/12

  Polyphenylene oxides · CPC title

• H05K2201/10378

  Interposers · CPC title

• C09J171/12

  Polyphenylene oxides · CPC title