Reliable contacts

Patent metadata

Field	Value
Publication number	US-9263322-B2
Application number	US-201314029820-A
Country	US
Kind code	B2
Filing date	Sep 18, 2013
Priority date	Sep 18, 2013
Publication date	Feb 16, 2016
Grant date	Feb 16, 2016

Abstract

Semiconductor devices and methods for forming a semiconductor device are presented. The method includes providing a substrate having a device component with a contact region. A contact dielectric layer is formed on the substrate, covering the substrate and device component. The contact dielectric layer includes a lower contact dielectric layer, an intermediate contact dielectric etch stop layer formed on the lower contact dielectric layer, and an upper contact dielectric layer formed on the intermediate contact dielectric etch stop layer. A contact opening is formed through the contact dielectric layer. The contact opening has an upper contact sidewall profile in the upper contact dielectric layer and a lower tapered contact sidewall profile in the lower contact dielectric layer. The tapered sidewall profile prevents shorting with the device component.

First claim

What is claimed is:

1. A method of forming a device comprising:
providing a substrate having a device component with a contact region;
forming a contact dielectric layer on the substrate, covering the substrate and the device component, wherein forming the contact dielectric layer comprises
forming a lower contact dielectric layer,
forming an intermediate contact dielectric etch stop layer on the lower contact dielectric layer,
forming an upper contact dielectric layer on the contact dielectric etch stop layer; and

forming a contact opening through the contact dielectric layer, wherein the contact opening has an upper contact sidewall profile in the upper contact dielectric layer and a lower tapered contact sidewall profile in the lower contact dielectric layer, wherein forming the contact opening comprises
forming a hard mask over the upper contact dielectric layer,
patterning the hard mask to form a hard mask opening corresponding to location where the contact opening is to be formed,
performing a first etch to remove exposed portion of the upper contact dielectric layer to form an upper portion of the contact opening having the upper contact sidewall profile,
performing a second etch to remove exposed portion of the intermediate contact dielectric etch stop layer, and
performing a third etch to remove exposed portion of the lower contact dielectric layer to form a lower portion of the contact opening having the lower tapered contact sidewall profile, wherein the lower tapered contact sidewall profile prevents shorting with the device component.

2. The method of claim 1 wherein the lower contact dielectric layer comprises a first dielectric material and the upper contact dielectric layer comprises a second dielectric material, wherein the first and second dielectric materials are different.

3. The method of claim 2 wherein the intermediate contact dielectric etch stop layer comprises a material which can be etched selective to the upper and lower contact dielectric layers.

4. The method of claim 2 wherein the upper and lower contact dielectric layers and the intermediate contact dielectric etch stop layer comprise about the same dielectric constant.

5. The method of claim 4 wherein the intermediate contact dielectric etch stop layer comprises one or more etch stop layers.

6. The method of claim 1 wherein the third etch comprises a polymer rich etch gas.

7. A method of forming a device comprising:
providing a substrate having at least one device component with a contact region;
forming a contact dielectric layer on the substrate, covering the substrate and the device component, wherein the contact dielectric layer comprises an upper portion and a lower portion;
forming an intermediate contact dielectric etch stop layer in between the upper and lower portions of the contact dielectric layer; and
forming a contact opening which passes through the upper and lower portions of the contact dielectric layer and the intermediate contact dielectric etch stop layer, wherein the same contact opening has an upper contact sidewall profile with a straight profile in the upper portion of the contact dielectric layer and a lower tapered contact sidewall profile in the lower portion of the contact dielectric layer which extends at least from bottom of the intermediate contact dielectric etch stop layer, wherein the lower tapered contact sidewall profile prevents shorting with the device component.

8. The method of claim 7 wherein forming the contact dielectric layer comprises:
forming a lower contact dielectric layer having a thickness T 1 , wherein the lower contact dielectric layer corresponds to the lower portion of the contact dielectric layer;
forming the intermediate contact dielectric etch stop layer having a thickness T 2 on the lower contact dielectric layer; and
forming an upper contact dielectric layer having a thickness T 3 on the intermediate contact dielectric etch stop layer, wherein the upper contact dielectric layer corresponds to the upper portion of the contact dielectric layer.

9. The method of claim 8 wherein the lower contact dielectric layer comprises a first dielectric material and the upper contact dielectric layer comprises a second dielectric material, wherein the first and second dielectric materials are different.

10. The method of claim 8 wherein:
the contact dielectric layer comprises a total thickness T T defined by the total thicknesses of T 1 , T 2 and T 3 and wherein the thickness T T comprises a thickness value of a first contact level depending on a technology node.

11. The method of claim 8 wherein:
the upper and lower contact dielectric layers comprise about the same dielectric constant; and comprising
adjusting the thickness T 2 of the intermediate contact dielectric etch stop layer to achieve about the same dielectric constant as the upper and lower contact dielectric layers.

12. The method of claim 8 wherein forming the contact opening comprises:
forming a hard mask over the upper contact dielectric layer;
patterning the hard mask to form a hard mask opening corresponding to location where the contact opening is to be formed;
performing a first etch to remove exposed portion of the upper contact dielectric layer to form an upper portion of the contact opening having the upper contact sidewall profile with the straight profile;
performing a second etch to remove exposed portion of the intermediate contact dielectric etch stop layer; and
performing a third etch to remove exposed portion of the lower contact dielectric layer to form a lower portion of the contact opening having the lower tapered contact sidewall profile.

13. The method of claim 7 wherein forming the contact opening comprises:
performing a first etch to remove exposed upper portion of the contact dielectric layer to form an upper portion of the contact opening having the upper contact sidewall profile with the straight profile;
performing a second etch to remove exposed portion of the intermediate contact dielectric etch stop layer; and
performing a third etch to remove exposed lower portion of the contact dielectric layer to form a lower portion of the contact opening having the lower tapered contact sidewall profile.

14. The method of claim 7 wherein the at least one device component comprises first and second device components, wherein the first and second device components comprise different heights.

15. The method of claim 7 wherein forming the contact dielectric layer comprises:
forming a lower contact dielectric layer over the substrate, wherein the lower contact dielectric layer corresponds to the lower portion of the contact dielectric layer;
forming the intermediate contact dielectric etch stop layer on the lower contact dielectric layer; and
forming an upper contact dielectric layer on the intermediate contact dielectric etch stop layer, wherein
the upper contact dielectric layer corresponds to the upper portion of the contact dielectric layer, and
the intermediate contact dielectric etch stop layer comprises at least first and second stop layers, wherein the first etch stop layer comprises a first dielectric constant k 1 and the second etch stop layer comprises a second dielectric constant k 2 , and thickness of the individual first and second etch stop layers are adjusted to achieve a desired dielectric constant which is about the same dielectric constant of the upper and lower contact dielectric layers.

16. A device comprising:
a substrate having at least one device component with a contact region;
a contact dielectric layer

Assignees

• Globalfoundries Sg Pte Ltd

Inventors

• Chang Tian-Lin
• Liang Jianfang
• Chen Aaron
• Chow Yew Tuck Clament
• Zhang Fan
• Tan Juan Boon

Classifications

• H10P50/283

  by chemical means · CPC title

• H10P50/73

  using masks for insulating materials · CPC title

• H10W20/074

  of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers · CPC title

• H10W20/20

  Interconnections within wafers or substrates, e.g. through-silicon vias [TSV] · CPC title

• H10W20/40

  Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes · CPC title