Memory cells, methods of forming memory cells, and methods of programming memory cells

Patent metadata

Field	Value
Publication number	US-9257648-B2
Application number	US-201414173096-A
Country	US
Kind code	B2
Filing date	Feb 5, 2014
Priority date	Feb 24, 2011
Publication date	Feb 9, 2016
Grant date	Feb 9, 2016

Abstract

Some embodiments include methods in which a memory cell is formed to have programmable material between first and second access lines, with the programmable material having two compositionally different regions. A concentration of ions and/or ion-vacancies may be altered in at least one of the regions to change a memory state of the memory cell and to simultaneously form a pn diode. Some embodiments include memory cells having programmable material with two compositionally different regions, and having ions and/or ion-vacancies diffusible into at least one of the regions. The memory cell has a memory state in which the first and second regions are of opposite conductivity type relative to one another.

First claim

We claim:

1. A method of forming and programming a memory cell, comprising:
forming a programmable material to be between first and second access lines, the programmable material having two compositionally different regions; and
altering a concentration of ions and/or ion vacancies in at least one of the regions of the programmable memory material to change a memory state of the memory cell and to simultaneously form a pn diode within the programmable material.

2. The method of claim 1 wherein:
said at least one of the first and second regions comprises a composition containing oxygen in combination with one or more of praseodymium, barium, calcium, manganese, strontium, titanium, iron, cesium and lead; and
the ions are oxygen-containing ions and/or the vacancies are vacancies of oxygen-containing ions.

3. The method of claim 1 wherein the memory cell has two memory states, with one of the memory states having the pn diode within the memory cell in a first orientation within the first and second regions, and with the other of the memory states having a pn diode within the first and second regions in an opposite orientation to the first orientation.

4. The method of claim 1 wherein the memory cell has two memory states, with one of the memory states having the pn diode within the memory cell, and with the other of the memory states having one of the regions as an electrically insulative material.

5. The method of claim 1 wherein the concentration of ions and/or of the ion vacancies is altered in one of the regions, and wherein the other of the regions is a conductively-doped semiconductor material.

6. The method of claim 1 wherein at least one of the access lines is permeable to the ions and/or to the ion vacancies.

7. The method of claim 1 wherein neither of the access lines is permeable to the ions and/or to the ion vacancies.

8. The method of claim 1 wherein the altering alters a concentration of oxygen-containing ions.

9. The method of claim 1 wherein the altering alters an amount of vacancies of oxygen-containing ions.

Assignees

• Micron Technology Inc

Inventors

• Liu Jun
• Sandhu Gurtej S

Classifications

• G11C2013/0073

  Write using bi-directional cell biasing · CPC title

• H01L45/1608

  Electricity · mapped topic

• H01L45/145

  Electricity · mapped topic

• H01L45/165 Primary

  Electricity · mapped topic

• G11C2213/73

  Array where access device function, e.g. diode function, being merged with memorizing function of memory element · CPC title