CMOS image sensor for increasing conversion gain

Patent metadata

Field	Value
Publication number	US-9257462-B2
Application number	US-201213530334-A
Country	US
Kind code	B2
Filing date	Jun 22, 2012
Priority date	Jul 15, 2011
Publication date	Feb 9, 2016
Grant date	Feb 9, 2016

Abstract

In one embodiment, the image sensor includes a first photodiode configured to convert an optical signal into a photocharge, a sensing node configured to store the photocharge of the first photodiode, and a circuit configured to selectively output an electrical signal corresponding to the photocharge at the sensing node on an output line. The circuit is connected to at least a first conductive contact, and the output line is disposed between the sensing node and the first conductive contact.

First claim

What is claimed is:

1. An image sensor comprising:
a first photodiode configured to convert an optical signal into a photocharge;
a sensing node configured to store the photocharge of the first photodiode;
a circuit configured to selectively output an electrical signal corresponding to the photocharge at the sensing node on an output line, and the circuit connected to at least a first conductive contact; and
the output line is between the sensing node and the first conductive contact, the output line surrounding at least one of the sensing node and the first conductive contact such that the output line is configured to shield the sensing node from the first conductive contact.

2. The image sensor of claim 1 , wherein
the circuit includes a transfer transistor configured to transfer the photocharge to the sensing node, the transfer transistor connected to the first conductive contact; and
the output line is between the sensing node and the first conductive contact.

3. The image sensor of claim 2 , wherein the transfer transistor has a gate connected to the first conductive contact for receiving a gate control signal.

4. The image sensor of claim 2 , wherein
the circuit includes a reset transistor configured to reset a voltage level of the sensing node, and the reset transistor is connected to a second conductive contact; and
the output line is between the sensing node and the second conductive contact.

5. The image sensor of claim 4 , wherein
the circuit includes a drive transistor configured to convert the photocharge into the electrical signal.

6. The image sensor of claim 5 , wherein
the circuit includes a select transistor configured to control transfer of the electrical signal to the output line, and the select transistor is connected to a third conductive contact; and
the output line is between the sensing node and the third conductive contact.

7. The image sensor of claim 6 , wherein the output line surrounds the sensing node.

8. The image sensor of claim 7 , wherein the output line is in a same plane as the sensing node.

9. The image sensor of claim 6 , wherein the output line further surrounds the third conductive contact.

10. The image sensor of claim 9 , wherein the output line is in a same plane as the sensing node.

11. The image sensor of claim 5 , wherein
the drive transistor is connected to a voltage supply, and has a drive gate connected to the sensing node.

12. The image sensor of claim 11 , wherein
the circuit includes a select transistor configured to control transfer of the electrical signal to the output line, and the select transistor is connected between the output line and the drive transistor, and has a select gate connected to a third conductive contact; and
the output line is between the sensing node and the third conductive contact.

13. The image sensor of claim 5 , wherein
the drive transistor is connected to the output line, and has a drive gate connected to the sensing node.

14. The image sensor of claim 13 , wherein the circuit includes a select transistor configured to control transfer of the electrical signal to the output line, and the select transistor is connected between a voltage supply and the drive transistor, and has a select gate connected to a third conductive contact; and
the output line is between the sensing node and the third conductive contact.

15. The image sensor of claim 5 , wherein
the reset transistor is connected between a voltage supply contact and the sensing node, and has a reset gate connected to the second conductive contact.

16. The image sensor of claim 15 , wherein
the circuit includes a select transistor configured to control transfer of the electrical signal to the output line, and the select transistor is connected between the voltage supply contact and the drive transistor, and has a select gate connected to a third conductive contact; and
the output line is between the sensing node and the third conductive contact.

17. The image sensor of claim 5 , wherein the transfer transistor has a gate connected to the first conductive contact for receiving a first gate control signal, the reset transistor has a gate connected to the second conductive contact for receiving a second gate control signal, and a select transistor has a gate connected to the third conductive contact for receiving a third gate control signal.

18. The image sensor of claim 1 , wherein
the circuit includes a reset transistor configured to reset a voltage level of the sensing node, and the reset transistor is connected to the first conductive contact; and
the output line is between the sensing node and the first conductive contact.

19. The image sensor of claim 18 , wherein the reset transistor has a gate connected to the first conductive contact for receiving a gate control signal.

20. The image sensor of claim 18 , wherein
the circuit includes a drive transistor configured to convert the photocharge into the electrical signal.

21. The image sensor of claim 20 , wherein
the circuit includes a select transistor configured to control transfer of the electrical signal to the output line, and the select transistor is connected to a second conductive contact; and
the output line is between the sensing node and the second conductive contact.

22. The image sensor of claim 18 , wherein
the circuit includes a transfer transistor configured to transfer the photocharge to the sensing node; and
a control transistor configured to control operation of the transfer transistor, and the control transistor is connected to a second conductive contact.

23. The image sensor of claim 22 , wherein
the control transistor has a gate connected to the second conductive contact.

24. The image sensor of claim 1 , wherein
the circuit includes a drive transistor configured to convert the photocharge into the electrical signal;
the circuit includes a select transistor configured to control transfer of the electrical signal to the output line, and the select transistor is connected to the first conductive contact; and
the output line is between the sensing node and the first conductive contact.

25. The image sensor of claim 24 , wherein the output line surrounds the first conductive contact.

26. The image sensor of claim 24 , wherein the select transistor has a gate connected to the first conductive contact for receiving a gate control signal.

27. The image sensor claim 1 , wherein the output line and the sensing node are in a same plane.

28. The image sensor of claim 1 , wherein the circuit is configured to receive a control signal via a conductive contact.

29. The image sensor of claim 1 , further comprising:
a second photodiode configured to convert the optical signal into the photocharge; and wherein
the sensing node is configured to store the photocharge of the second photodiode.

30. The image sensor of claim 29 , wherein the circuit comprises:
a first transfer transistor configured to transfer the photocharge of the first photodiode to the sensing node, the first transfer transistor connected to the first conductive contact;
a second transfer transistor configured to transfer the photocharge of the second photodiode to the sensing node, the second transfer transistor connected to a second conductive contact;
a reset transistor configured to reset a

Assignees

• Park Young Hwan
• Ahn Jung Chak
• Lee Sang Joo
• Park Jong Eun
• Jang Young Heub
• Samsung Electronics Co Ltd

Inventors

• Park Young Hwan
• Ahn Jung Chak
• Lee Sang Joo
• Park Jong Eun
• Jang Young Heub

Classifications

• H10F39/802 Primary

  Geometry or disposition of elements in pixels, e.g. address-lines or gate electrodes · CPC title

• H10F39/813 Primary

  Electronic components shared by multiple pixels, e.g. one amplifier shared by two pixels · CPC title

• H01L27/14641

  Electricity · mapped topic

• H01L27/14603 Primary

  Electricity · mapped topic