Semiconductor device and manufacturing method thereof

Patent metadata

Field	Value
Publication number	US-9257449-B2
Application number	US-201414320757-A
Country	US
Kind code	B2
Filing date	Jul 1, 2014
Priority date	Nov 13, 2009
Publication date	Feb 9, 2016
Grant date	Feb 9, 2016

Abstract

An object is to provide a semiconductor device with a novel structure. A semiconductor device includes a first transistor including a silicon region, a first gate insulating layer, a first gate electrode, and a first source electrode and a first drain electrode, a first insulating layer, a second insulating layer, a third insulating layer, and a second transistor, which includes an oxide semiconductor layer over the third insulating layer, a second source electrode and a second drain electrode, a second gate insulating layer, and a second gate electrode, and a fourth insulating layer and a fifth insulating layer. A first electrode passes through the first insulating layer and the second insulating layer to be electrically connected to the silicon region, and a second electrode passes through the third insulating layer, the fourth insulating layer and the fifth insulating layer to be electrically connected to the first electrode.

First claim

The invention claimed is:

1. A semiconductor device comprising:
a first transistor including a silicon region, a first gate insulating layer over the silicon region, a first gate electrode over the first gate insulating layer;
a first insulating layer over the first gate electrode;
a second insulating layer over the first insulating layer;
a third insulating layer over the second insulating layer;
a second transistor including an oxide semiconductor layer over the third insulating layer, a second gate insulating layer over the oxide semiconductor layer, and a second gate electrode over the second gate insulating layer;
a fourth insulating layer over the second gate electrode;
a fifth insulating layer over the fourth insulating layer;
a first electrode passing through the first insulating layer and the second insulating layer, wherein the first electrode is electrically connected to the silicon region; and
a second electrode passing through the third insulating layer, the fourth insulating layer and the fifth insulating layer, wherein the second electrode is provided over the first electrode and is electrically connected to the first electrode.

2. The semiconductor device according to claim 1 , wherein the third insulating layer is a base layer of the second transistor.

3. The semiconductor device according to claim 1 , wherein the fourth insulating layer and the fifth insulating layer include silicon oxide, silicon nitride oxide, silicon nitride, hafnium oxide, aluminum oxide, or tantalum oxide.

4. The semiconductor device according to claim 1 , wherein a channel formation region of the first transistor is not overlapped with the oxide semiconductor layer.

5. The semiconductor device according to claim 1 , wherein the semiconductor device is incorporated in one selected from the group consisting of a computer, a personal digital assistant, an electronic book, a phone, a camera, and a television set.

6. A semiconductor device comprising:
a first transistor including a silicon region, a first gate insulating layer over the silicon region, a first gate electrode over the first gate insulating layer;
a first insulating layer over the first gate electrode;
a second insulating layer over the first insulating layer;
a third insulating layer over the second insulating layer;
a second transistor including an oxide semiconductor layer over the third insulating layer, a second gate insulating layer over the oxide semiconductor layer, a second gate electrode over the second gate insulating layer, and a source electrode and a drain electrode overlapping the oxide semiconductor layer;
a fourth insulating layer over the second gate electrode;
a fifth insulating layer over the fourth insulating layer;
a first electrode passing through the first insulating layer and the second insulating layer, wherein the first electrode is electrically connected to the silicon region; and
a second electrode passing through the third insulating layer, the fourth insulating layer and the fifth insulating layer, wherein the second electrode is provided over the first electrode and is electrically connected to the first electrode.

7. The semiconductor device according to claim 6 , wherein the third insulating layer is a base layer of the second transistor.

8. The semiconductor device according to claim 6 , wherein the fourth insulating layer and the fifth insulating layer include silicon oxide, silicon nitride oxide, silicon nitride, hafnium oxide, aluminum oxide, or tantalum oxide.

9. The semiconductor device according to claim 6 , wherein a channel formation region of the first transistor is not overlapped with the oxide semiconductor layer.

10. The semiconductor device according to claim 6 , wherein the semiconductor device is incorporated in one selected from the group consisting of a computer, a personal digital assistant, an electronic book, a phone, a camera, and a television set.

Assignees

• Semiconductor Energy Lab

Inventors

• Yamazaki Shunpei
• Koyama Jun

Classifications

• H10D62/875

  being semiconductor metal oxide, e.g. InGaZnO (Group II-VI materials H10D62/86; Group I-VI materials H10D62/871; Pb compounds or alloys H10D62/874) · CPC title

• H10D88/01

  Manufacture or treatment · CPC title

• H10D88/00

  Three-dimensional [3D] integrated devices · CPC title

• H10D86/423

  comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO · CPC title

• H10D86/60

  wherein the TFTs are in active matrices · CPC title