Method for embedding a chipset having an intermediary interposer in high density electronic modules

Patent metadata

Field	Value
Publication number	US-9257355-B2
Application number	US-201414177595-A
Country	US
Kind code	B2
Filing date	Feb 11, 2014
Priority date	Feb 11, 2013
Publication date	Feb 9, 2016
Grant date	Feb 9, 2016

Abstract

A method for creating a high density electronic module including the steps of coupling a die to an interposer for form a chipset, mounting the chipset to a substrate, coupling a wafer to the substrate so that the chipset is within a window formed in the wafer, filling the window with encapsulant to encapsulate the chipset, removing the substrate to create a reconstructed wafer, and providing an interconnection structure on the interposer to form the high density electronic module.

First claim

What is claimed is:

1. A high density electronic module component comprising:
a chipset including a die coupled to an interposer, the chipset, the die and the interposer together having a first thickness;
a wafer defining a window surrounding the chipset, the wafer having a second thickness defined by a top surface and a bottom surface of the wafer, the window extending depthwise from the top surface to the bottom surface of the wafer, wherein the first thickness does not exceed the second thickness; and
encapsulant filling the window around the chipset, wherein at least a portion of the interposer is exposed.

2. A high density electronic module component as recited in claim 1 , wherein the encapsulant and die have been thinned so that the die is exposed.

3. A high density electronic module component as recited in claim 1 , wherein the high density electronic module component has a die side and an interposer side, and further comprising a first interconnect structure coupled to the interposer side.

4. A high density electronic module component as recited in claim 3 , further comprising:
through substrate vias (TSVs) within the window; and
a second interconnect structure coupled to the die side and electrically connected to the TSVs.

5. A high density electronic module component as recited in claim 1 , further comprising preformed interconnects in a full thickness substrate.

6. A high density electronic module component as recited in claim 1 , further comprising free end wire bonds for completing electrical connections.

7. A high density electronic module component as recited in claim 1 , wherein the encapsulant is completely filling the window around the chipset.

Assignees

• Draper Lab Charles S

Inventors

• Smith Brian
• Karpman Maurice

Classifications

• H10W90/734

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/722

  between stacked chips · CPC title

• H10W74/117

  the substrate having spherical bumps for external connection · CPC title

• H10W74/15

  on active surfaces of flip-chip devices, e.g. underfills · CPC title