Semiconductor devices having a seal ring
US-2024413245-A1 · Dec 12, 2024 · US
Air-gap offset spacer in FinFET structure
US9252233B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9252233-B2 |
| Application number | US-201414205971-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 12, 2014 |
| Priority date | Mar 12, 2014 |
| Publication date | Feb 2, 2016 |
| Grant date | Feb 2, 2016 |
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Abstract
Official abstract text for this publication.
The present disclosure relates to a method of forming a FinFET device having sidewalls spacers comprising an air gap that provides for a low dielectric constant, and an associated apparatus. In some embodiments, the method is performed by forming a fin of semiconductor material on a semiconductor substrate. A gate structure, having a gate dielectric layer and an overlying gate material layer, is formed at a position overlying the fin of semiconductor material. Sidewall spacers are formed at positions abutting opposing sides of the gate structure. Respective sidewall spacers have a first layer of insulating material abutting the gate structure and a second layer of insulating material separated from the first layer of insulating material by an air gap. By forming the FinFET device to have sidewall spacers with air gaps, the parasitic capacitance of the FinFET device and a corresponding RC time delay are decreased.
First claim
Opening claim text (preview).
What is claimed is: 1. A method of forming a FinFET (Fin field effect transistor) device, comprising: forming a fin of semiconductor material on a semiconductor substrate; forming a gate structure protruding from the substrate at a position overlying the fin of semiconductor material, wherein the gate structure comprises a gate dielectric layer and an overlying gate material layer; forming a source region and a drain region on opposite ends of the gate structure at positions c…
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Electricity · mapped topic
Electricity · mapped topic
- H10D30/62Primary
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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- What does patent US9252233B2 cover?
- The present disclosure relates to a method of forming a FinFET device having sidewalls spacers comprising an air gap that provides for a low dielectric constant, and an associated apparatus. In some embodiments, the method is performed by forming a fin of semiconductor material on a semiconductor substrate. A gate structure, having a gate dielectric layer and an overlying gate material layer, i…
- Who is the assignee on this patent?
- Taiwan Semiconductor Mfg Co Ltd
- What technology area does this patent fall under?
- Primary CPC classification H10D30/62. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Feb 02 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).