Circuit for calculating weight adjustments of an artificial neural network, and a module implementing a long short-term artificial neural network
US-12056602-B2 · Aug 6, 2024 · US
US9251884B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9251884-B2 |
| Application number | US-201414222813-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 24, 2014 |
| Priority date | Mar 24, 2014 |
| Publication date | Feb 2, 2016 |
| Grant date | Feb 2, 2016 |
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A nonvolatile memory storage device includes a ferroelectric (FE) material coupled with a piezoresistive (PR) material through an inherent piezoelectric response of the FE material, wherein an electrical resistance of the PR material is dependent on a compressive stress applied thereto, the compressive stress caused by a remanent strain of the FE material resulting from a polarization of the FE material, such that a polarized state of the FE material results in a first resistance value of the PR material, and a depolarized state of the FE material results in a second resistance value of the PR material.
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The invention claimed is: 1. A multibit, nonvolatile memory storage device, comprising: a first ferroelectric (FE) material and a second FE material coupled with a piezoresistive (PR) material through an inherent piezoelectric response of the first FE material and second FE material, and arranged in a single stack, wherein an electrical resistance of the PR material is dependent upon on a compressive stress applied thereto, the compressive stress caused by a remanent strain of the first FE material and the second FE material resulting from a polarization of the first FE material and a polarization of the second FE material such that the PR material is set to assume one of a first resistance value, a second resistance value, a third resistance value of the PR material, and a fourth resistance value. 2. The multibit, nonvolatile memory storage device of claim 1 , wherein: the first and second FE materials are polarized by initial application of a voltage thereacross to result in an initial polarization D s , and thereafter by removal of the voltage to leave the first and second FE materials with a remanent polarization D r ; and the first and second FE materials are depolarized by applying an alternating voltage of decreasing amplitude thereacross. 3. The multibit, nonvolatile memory storage device of claim 2 , wherein the first FE material is disposed between first and second electrodes, the second FE material is disposed between third and fourth electrodes and the PR element is disposed between the fourth electrode and a fifth electrode, and wherein the second and third electrodes are electrically insulated from one another. 4. The multibit, nonvolatile memory storage device of claim 3 , wherein: a depolarized state of the first FE material and a depolarized state of the second FE material results in the first resistance value of the PR material; the depolarized state of the first FE material and a polarized state of the second FE material results in the second resistance value of the PR material; a polarized state of the first FE material and the depolarized state of the second FE material results in the third resistance value of the PR material; and the polarized state of the first FE material and the polarized state of the second FE material results in the fourth resistance value of the PR material. 5. The multibit, nonvolatile memory storage device of claim 4 , wherein the first FE material has a thickness of about twice that of the second FE material. 6. The multibit, nonvolatile memory storage device of claim 2 , wherein the first FE material and the second FE material are in contact with one another and are disposed between first and second electrodes, and the PR element is disposed between the second electrode and a third electrode. 7. The multibit, nonvolatile memory storage device of claim 6 , wherein the first FE material and the second FE material are different from one another such that: a depolarized state of the first and second FE materials results in the first resistance value of the PR material; a first polarized state of the first and second FE materials results in the second resistance value of the PR material; a second polarized state of the first and second FE materials results in the third resistance value of the PR material; and a third polarized state of the first and second FE materials results in the fourth resistance value of the PR material. 8. The multibit, nonvolatile memory storage device of claim 1 , wherein: the first FE material, the second FE material and the PR material define a storage transistor; and the multibit, nonvolatile memory storage device further comprises an access transistor formed in the single stack with the storage transistor, the access transistor further comprising a third FE material mechanically coupled to and electrically insulated from the first FE material and the second FE material.
Array wherein the access device being a transistor · CPC title
Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 · CPC title
Write using strain induced by, e.g. piezoelectric, thermal effects · CPC title
Writing or programming circuits or methods · CPC title
Writing or programming circuits or methods · CPC title
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