Source, target and mask optimization by incorporating countour based assessments and integration over process variations

Patent metadata

Field	Value
Publication number	US-9250535-B2
Application number	US-201313837435-A
Country	US
Kind code	B2
Filing date	Mar 15, 2013
Priority date	Mar 15, 2013
Publication date	Feb 2, 2016
Grant date	Feb 2, 2016

Abstract

Methods and systems for determining a source shape, a mask shape and a target shape for a lithography process are disclosed. One such method includes receiving source, mask and target constraints and formulating an optimization problem that is based on the source, mask and target constraints and incorporates contour-based assessments for the target shape that are based on physical design quality of a circuit. Further, the optimization problem is solved by integrating over process condition variations to simultaneously determine the source shape, the mask shape and the target shape. In addition, the determined source shape and mask shape are output.

First claim

What is claimed is:

1. A method for determining a source shape, a mask shape and a target shape for a lithography process comprising:
receiving source, mask and target constraints;
formulating an optimization problem that is based on the source, mask and target constraints and incorporates contour-based assessments for the target shape that are based on physical design quality of a circuit, by forming a constraint function;
solving, by a hardware processor, the optimization problem by integrating over process condition variations to simultaneously determine the source shape, the mask shape and the target shape; and
outputting the determined source shape and mask shape.

2. The method of claim 1 , wherein the integrating over the process condition variations employs the contour-based assessments under multiple process conditions within a process control space.

3. The method of claim 1 , wherein said target constraints include at least one of tolerance band constraints or process variability band constraints for the target shape.

4. The method of claim 3 , wherein said target constraints include tolerance band constraints and wherein said contour-based assessments are based on said tolerance band constraints and are further based on post-lithography quality.

5. The method of claim 3 , wherein the solving comprises maximizing a functionality modeling function with said source, mask and target constraints.

6. The method of claim 5 , wherein the functionality modeling function is based on distances between contours of the target shape and borders of tolerance bands.

7. The method of claim 6 , wherein the maximizing comprises maximizing a per-target contour yield.

8. The method of claim 7 , wherein the yield is a function of at least one of focus, light dose variation or mask error.

9. The method of claim 7 , wherein the functionality modeling function is dependent on a process probability that is based on data measured from a physical optical system.

10. The method of claim 7 , wherein the yield accounts for inter-chip variations.

11. The method of claim 5 , wherein the solving comprises varying a location of at least one evaluation point of said target shape independently from a location of at least one other evaluation point of said target shape.

12. A method for determining a source shape, a mask shape and a target shape for a lithography process comprising:
receiving source, mask and target constraints including tolerance band constraints for the target shape;
formulating an optimization problem based on the source, mask and target constraints by forming a constraint function;
solving, by a hardware processor, the optimization problem by maximizing a process window with said source, mask and target constraints to simultaneously determine the source shape, the mask shape and the target shape; and
outputting the determined source shape and mask shape.

13. The method of claim 12 , wherein said target constraints further comprise process variability band constraints for the target shape.

14. The method of claim 13 , wherein said target constraints are set at each evaluation point of said target shape such that any contour position is within a corresponding tolerance band of said tolerance band constraints.

15. The method of claim 12 , wherein the solving comprises varying a location of at least one evaluation point of said target shape independently from a location of at least one other evaluation point of said target shape.

16. A system for determining a source shape, a mask shape and a target shape for a lithography process comprising:
an objective formulation module configured to receive source, mask and target constraints including tolerance band constraints for the target shape and to formulate an optimization problem based on the source, mask and target constraints by forming a constraint function; and
a solver, implemented by a hardware processor, configured to solve the optimization problem by minimizing process variability bands with said source, mask and target constraints to simultaneously determine the source shape, the mask shape and the target shape, and configured to output the determined source shape and mask shape.

17. The system of claim 16 , wherein the optimization problem is dependent on an edge placement error that is based on at least one of a defocus condition, a light dose condition and a mask error condition.

18. The system of claim 16 , wherein the solver is further configured to vary a location of at least one evaluation point of said target shape independently from a location of at least one other evaluation point of said target shape.

19. The system of claim 16 , wherein said solver is a non-linear solver.

20. The system of claim 16 , wherein said solver is further configured to output said determined target shape.

Assignees

• IBM

Inventors

• Inoue Tadanobu
• Melville David O
• Rosenbluth Alan E
• Sakamoto Masaharu
• Tian Kehan

Classifications

• G03F7/70125 Primary

  Use of illumination settings tailored to particular mask patterns (details of setting means G03F7/70091) · CPC title

• G03F7/70441 Primary

  Optical proximity correction [OPC] · CPC title

• G03F7/70308

  Optical correction elements, filters or phase plates for manipulating imaging light, e.g. intensity, wavelength, polarisation, phase or image shift · CPC title

• G06F30/392

  Floor-planning or layout, e.g. partitioning or placement · CPC title

• G03F7/705

  Modelling or simulating from physical phenomena up to complete wafer processes or whole workflow in wafer productions · CPC title