Digital phase-locked loop and related merged duty cycle calibration scheme for frequency synthesizers
US-2024171181-A1 · May 23, 2024 · US
US9246480B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9246480-B2 |
| Application number | US-201414294130-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 2, 2014 |
| Priority date | Jun 2, 2014 |
| Publication date | Jan 26, 2016 |
| Grant date | Jan 26, 2016 |
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A method for performing phase shift control in an electronic device and an associated apparatus are provided, where the method includes: obtaining a set of clock signals corresponding to a set of phases, wherein any two phases of the set of phases are different from each other; and controlling a phase shift of an output signal of an oscillator by selectively mixing the set of clock signals into the oscillator according to a set of digital weighting control signals, wherein the phase shift corresponds to the set of digital weighting control signals, and the set of digital weighting control signals carries a set of digital weightings for selectively mixing the set of clock signals. More particularly, the method may include: selectively mixing the set of clock signals into a specific stage of a plurality of stages of the oscillator according to the set of digital weighting control signals.
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What is claimed is: 1. A method for performing phase shift control in an electronic device, the method comprising the steps of: obtaining a set of clock signals corresponding to a set of phases, wherein any two phases of the set of phases are different from each other; and controlling a phase shift of an output signal of an oscillator by selectively mixing the set of clock signals into the oscillator according to a set of digital weighting control signals, wherein the phase shift corresponds to the set of digital weighting control signals, and the set of digital weighting control signals carries a set of digital weightings for selectively mixing the set of clock signals. 2. The method of claim 1 , wherein the oscillator comprises a plurality of stages; and the step of controlling the phase shift of the output signal of the oscillator by selectively mixing the set of clock signals into the oscillator according to the set of digital weighting control signals further comprises: controlling the phase shift of the output signal of the oscillator by selectively mixing the set of clock signals into a specific stage of the plurality of stages according to the set of digital weighting control signals. 3. The method of claim 2 , wherein the step of controlling the phase shift of the output signal of the oscillator by selectively mixing the set of clock signals into the oscillator according to the set of digital weighting control signals further comprises: controlling the phase shift of the output signal of the oscillator by injecting at least one portion of the set of clock signals into the specific stage according to the set of digital weighting control signals, wherein a signal count of the at least one portion of the set of clock signals corresponds to the set of digital weightings carried by the set of digital weighting control signals. 4. The method of claim 2 , further comprising: obtaining another set of clock signals corresponding to another set of phases, wherein any two phases of the other set of phases are different from each other; wherein the step of controlling the phase shift of the output signal of the oscillator by selectively mixing the set of clock signals into the oscillator according to the set of digital weighting control signals further comprises: controlling the phase shift of the output signal of the oscillator by selectively mixing the set of clock signals into the specific stage of the plurality of stages according to the set of digital weighting control signals and by selectively mixing the other set of clock signals into another stage of the plurality of stages according to another set of digital weighting control signals. 5. The method of claim 4 , wherein the step of controlling the phase shift of the output signal of the oscillator by selectively mixing the set of clock signals into the oscillator according to the set of digital weighting control signals further comprises: controlling the phase shift of the output signal of the oscillator by injecting at least one portion of the set of clock signals into the specific stage of the plurality of stages according to the set of digital weighting control signals and by injecting at least one portion of the other set of clock signals into the other stage of the plurality of stages according to the other set of digital weighting control signals, wherein a signal count of the at least one portion of the set of clock signals corresponds to the set of digital weightings carried by the set of digital weighting control signals, and a signal count of the at least one portion of the other set of clock signals corresponds to a set of digital weightings carried by the other set of digital weighting control signals. 6. The method of claim 4 , wherein the other set of clock signals is equivalent to the set of clock signals. 7. The method of claim 2 , wherein the step of controlling the phase shift of the output signal of the oscillator by selectively mixing the set of clock signals into the oscillator according to the set of digital weighting control signals further comprises: controlling the phase shift of the output signal of the oscillator by injecting at least one portion of the set of clock signals into the specific stage according to the set of digital weighting control signals, rather than by locking the output signal onto any reference signal within the electronic device. 8. The method of claim 2 , wherein each stage of the plurality of stages comprises a voltage mode amplifier. 9. The method of claim 8 , wherein the step of controlling the phase shift of the output signal of the oscillator by selectively mixing the set of clock signals into the oscillator according to the set of digital weighting control signals further comprises: utilizing a set of adjustable capacitors respectively corresponding to the set of clock signals, to selectively mix the set of clock signals into the oscillator according to the set of digital weighting control signals, wherein the set of adjustable capacitors is controlled by the set of digital weighting control signals. 10. The method of claim 2 , wherein each stage of the plurality of stages comprises a current mode amplifier. 11. The method of claim 10 , wherein the step of controlling the phase shift of the output signal of the oscillator by selectively mixing the set of clock signals into the oscillator according to the set of digital weighting control signals further comprises: utilizing a set of adjustable current sources respectively corresponding to the set of clock signals, to selectively mix the set of clock signals into the oscillator according to the set of digital weighting control signals, wherein the set of adjustable current sources is controlled by the set of digital weighting control signals, and each adjustable current source of the set of adjustable current sources selectively mixes a corresponding clock signal of the set of clock signals into the oscillator according to a corresponding digital weighting control signal of the set of digital weighting control signals. 12. The method of claim 1 , further comprising: monitoring an operation frequency of the oscillator to control a slew rate of the electronic device. 13. An apparatus for performing phase shift control in an electronic device, the apparatus comprising at least one portion of the electronic device, the apparatus comprising: an oscillator arranged to generate an output signal; and at least one mixing circuit, electrically connected to the oscillator, arranged to perform phase shift control on the output signal of the oscillator, wherein the at least one mixing circuit comprises: a set of clock receiving terminals arranged to obtain a set of clock signals corresponding to a set of phases, wherein any two phases of the set of phases are different from each other; wherein the at least one mixing circuit controls a phase shift of the output signal of the oscillator by selectively mixing the set of clock signals into the oscillator according to a set of digital weighting control signals; and the phase shift corresponds to the set of digital weighting control signals, and the set of digital weighting control signals carries a set of digital weightings for selectively mixing the set of clock signals. 14. The apparatus of claim 13 , wherein the oscillator comprises a plurality of stages; and the at least one mixing circuit controls the phase shift of the output signal of the oscillator by selectively mixing the set of clock signals into a specific stage of the plurality of stages according to the set of digital weighting control signals. 15.
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