Light emitting diode device having super lattice structure and a nano-structure layer

Patent metadata

Field	Value
Publication number	US-9240518-B2
Application number	US-201414461990-A
Country	US
Kind code	B2
Filing date	Aug 18, 2014
Priority date	Apr 2, 2014
Publication date	Jan 19, 2016
Grant date	Jan 19, 2016

Abstract

A light emitting diode device is provided, which comprises a silicon-based substrate, a buffer layer, a super lattice structure layer, a nano-structure layer, a first semiconductor layer, a light emitting layer, and a second semiconductor layer. The buffer layer is formed on the silicon-based substrate, the super lattice structure layer is formed on the buffer layer, the nano-structure layer is formed on the super lattice structure layer, a first semiconductor layer is formed on the nano-structure layer, and the light emitting layer is formed between the first semiconductor layer and the second semiconductor layer. The super lattice layer and the nano-structure can release the stress within the light emitting diode device, and reduce the epitaxy defect, so that the internal quantum effect and the external quantum effect can be increased.

First claim

What is claimed is:

1. A light emitting diode device having a super lattice structure layer, comprising:
a silicon-based substrate;
a buffer layer formed on the silicon-based substrate, wherein the buffer layer comprises aluminum gallium nitride (AlGaN);
a super lattice structure layer formed on the buffer layer such that the buffer layer is between the silicon-based substrate and the super lattice structure layer, wherein the super lattice structure layer is composed of multi-layer of aluminum gallium nitride/gallium nitride (AlGaN/GaN) pairs and piled up by 2 nm scale dielectric materials such as 1 nm/1 nm, 2 nm/2 nm or 2 nm/6 nm of aluminum gallium nitride/gallium nitride (AlGaN/GaN);
a nano-structure layer formed in contact with the super lattice structure layer, wherein the nano-structure layer is selected from the group consisting of silicon dioxide (SiO 2 ), silicon nitride (SiN x ), air voids and composite single-layer dielectric material;
a first semiconductor layer formed on the nano-structure layer and portions of the first semiconductor layer are in contact with the super lattice structure layer, wherein the first semiconductor layer is n-type GaN;
a light emitting layer formed on the first semiconductor layer, wherein the light emitting layer is selected from the group consisting of single Quantum well and multi-Quantum well; and
a second semiconductor layer formed on the light emitting layer, and the second semiconductor layer is p-type GaN.

2. The device according to claim 1 , wherein the nano-structure layer is selected from the group consisting of a continuous structure and discontinuous structure formed on the super lattice structure layer.

3. The device according to claim 1 , wherein the thickness of the super lattice structure layer is about 1 nm to 10 nm, and total thickness is about 100 nm to 1000 nm.

Assignees

• Univ Nat Chiao Tung

Inventors

• Lee Chia-Yu
• Lin Da-Wei
• Tzou An-Jye
• Kuo Hao-Chung

Classifications

• H10H20/825

  containing nitrogen, e.g. GaN · CPC title

• H10H20/824

  comprising only Group III-V materials, e.g. GaP · CPC title

• H10H20/812

  within the light-emitting regions, e.g. having quantum confinement structures · CPC title

• H10H20/811

  having quantum effect structures or superlattices, e.g. tunnel junctions · CPC title

• H10H20/815 Primary

  having stress relaxation structures, e.g. buffer layers · CPC title