Method for producing at least one pad assembly on a support for the self-assembly of an integrated circuit chip on the support by the formation of a fluorinated material surrounding the pad and exposure of the pad and the fluorinated material to an ultraviolet treatment in the presence of ozone

US9240389B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9240389-B2
Application numberUS-201314438668-A
CountryUS
Kind codeB2
Filing dateMar 20, 2013
Priority dateMar 22, 2012
Publication dateJan 19, 2016
Grant dateJan 19, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method for producing at least one pad assembly ( 32, 50 ) on a support ( 19, 43 ) for use in a method for self-assembling at least one element ( 10 ) on the support ( 19, 43 ), comprises fanning, on the support ( 19, 43 ), a layer ( 28, 48 ) of at least one fluorinated material around the location ( 30, 44 ) of the pad assembly ( 32, 50 ), the layer ( 28, 48 ) having a thickness greater than 10 nm. The layer ( 28, 48 ) and the location ( 30, 44 ) are exposed to an ultraviolet treatment in the presence of ozone to form the pad assembly ( 32, 50 ) at said location ( 30, 44 ), wherein a drop of liquid ( 16 ) having a static contact angle on the pad assembly ( 32, 50 ) less than or equal to 15°, after the exposure to the ultraviolet treatment, has a static contact angle on the layer ( 28, 48 ) greater than or equal to 100°.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method for manufacturing at least one assembly pad on a support intended for the implementation of a method of self-assembly of at least one element ( 10 ) on the support, the manufacturing method comprising the successive steps of: (a) forming, on the support, a layer of at least one fluorinated material around the location of the assembly pad; the layer having a thickness higher than 10 nm; and (b) submitting the layer and the location to an ultraviolet processing in the presence of ozone to form the assembly pad at said location surrounded with said layer, a drop of demineralized water having a static contact angle on the assembly pad lower or equal to 15°, the demineralized water drop having, after step b), a static contact angle higher or equal to 100°. 2. The method of claim 1 , wherein the fluorinated material is a fluorocarbon material. 3. The method of claim 1 , wherein step (a) comprises exposing the support to a plasma based on octafluorobutene, hexafluoroethane, carbon tetrafluoride, and/or trifluoromethane. 4. The method of claim 1 , further comprising the steps of: (c) forming a resin portion on the support at said location before step (a); and (d) removing the resin portion before step (b). 5. The method of claim 4 , further comprising, after step (c) and before step (a), a step of etching the support to form a protrusion under the resin portion ( 26 ). 6. The method of claim 1 , wherein the support comprises a semiconductor material substrate having the fluorinated material layer formed thereon, the method further comprising a step of forming an oxide layer of the semiconductor material on the substrate before step (a). 7. The method of claim 1 , further comprising the steps of: (e) depositing a drop of a liquid on the assembly pad; and (f) bringing the element in contact with the drop, whereby the element is self-assembled with respect to the support. 8. The method of claim 7 , wherein the element is an integrated circuit chip. 9. The method of claim 7 , further comprising the steps of: (g) drying the drop; and (h) bonding the element to the support. 10. The method of claim 9 , wherein step (h) comprises a step of molecular bonding of the element to the assembly pad. 11. A support intended for the implementation of a method of self-assembly of at least one element on the support, comprising: at least one assembly pad, a liquid drop having a static contact angle on the assembly pad smaller than or equal to 15°; and a layer at least one fluorinated material around the assembly pad, the liquid drop having a static contact angle on the layer greater than or equal to 100°. 12. The support of claim 11 , wherein the liquid drop has a static contact angle on the assembly pad smaller than or equal to 10° and has a static contact angle on the layer greater than or equal to 110°. 13. The support of claim 11 , wherein the fluorinated material is a fluorocarbon material. 14. The support of claim 11 , further comprising a protrusion comprising sides and a top, the assembly pad being on the top and the layer covering the sides. 15. The support of claim 14 , wherein the sides are inclined by more than 45° with respect to the top. 16. The support of claim 11 , further comprising a substrate, the assembly pad and the layer being formed on the substrate, the substrate being made of a semiconductor material, the assembly pad comprising an oxide of the semiconductor material.

Assignees

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Classifications

  • batch processes · CPC title

  • Package configurations · CPC title

  • of die-attach connectors · CPC title

  • not comprising solid metals or solid metalloids, e.g. polymers, ceramics or liquids · CPC title

  • Thermocompression bonding · CPC title

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Frequently asked questions

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What does patent US9240389B2 cover?
A method for producing at least one pad assembly ( 32, 50 ) on a support ( 19, 43 ) for use in a method for self-assembling at least one element ( 10 ) on the support ( 19, 43 ), comprises fanning, on the support ( 19, 43 ), a layer ( 28, 48 ) of at least one fluorinated material around the location ( 30, 44 ) of the pad assembly ( 32, 50 ), the layer ( 28, 48 ) having a thickness greater than …
Who is the assignee on this patent?
Commissariat Energie Atomique, St Microelectronics Crolles 2, Stmicroelectronics Crolles2 Sas
What technology area does this patent fall under?
Primary CPC classification H05K3/303. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 19 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).