Applications of contact-transfer printed membranes
US-2015268461-A1 · Sep 24, 2015 · US
Electronic component embedded substrate
US9237654B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9237654-B2 |
| Application number | US-201414206254-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 12, 2014 |
| Priority date | Dec 31, 2013 |
| Publication date | Jan 12, 2016 |
| Grant date | Jan 12, 2016 |
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- Title
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- Abstract
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Abstract
Official abstract text for this publication.
An electronic component embedded substrate is disclosed. The electronic component embedded substrate in accordance with an embodiment of the present invention includes: a core substrate having a cavity formed therein; a plurality of electronic components embedded in the cavity and arranged in a predetermined format; and a plurality of dielectric spacers interposed in between the plurality of electronic components that are adjacent to one another in the cavity.
First claim
Opening claim text (preview).
What is claimed is: 1. An electronic component embedded substrate, comprising: a core substrate having a cavity formed therein; a plurality of electronic components embedded in the cavity and arranged in a predetermined format; and a plurality of dielectric spacers interposed in between the plurality of electronic components that are adjacent to one another in the cavity. 2. The electronic component embedded substrate of claim 1 , wherein the dielectric spacers are each coupled to one lateral surface of each of the plurality of electronic components. 3. The electronic component embedded substrate of claim 1 , wherein each of the plurality of dielectric spacers comprises a first dielectric spacer and a second dielectric spacer that are coupled to each of the plurality of electronic components, and wherein each of the first dielectric spacer and the second dielectric spacer is coupled to a body, a first external electrode and a second external electrode of each of the plurality of electronic components. 4. The electronic component embedded substrate of claim 1 , wherein each of the dielectric spacers is coupled partially to one lateral surface of each of the plurality of electronic components, and wherein each of the dielectric spacers is coupled to at least one of a body, a first external electrode and a second external electrode of each of the plurality of electronic components. 5. The electronic component embedded substrate of claim 1 , wherein a first dielectric spacer and a second dielectric spacer are coupled to either lateral surface of every even ordinal number arranged electronic component among an odd number of electronic components that are arranged parallel in the cavity, and wherein each of the first dielectric spacer and the second dielectric spacer is coupled to a body, a first external electrode and a second dielectric electrode of each of the electronic components. 6. The electronic component embedded substrate of claim 1 , wherein each of the dielectric spacers is coupled partially to one lateral surface of each of the plurality of electronic components that are arranged parallel in the cavity, and wherein each of the dielectric spacers is coupled to one selected portion of each of a body, a first external electrode and a second dielectric electrode of each of the electronic components.
Assignees
Inventors
Classifications
characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated · CPC title
- H05K1/185Primary
associated with components encapsulated in the insulating substrate of the PCBs; associated with components incorporated in internal layers of multilayer circuit boards · CPC title
Adjacent components · CPC title
spacers regularly patterned on the cell subtrate, e.g. walls, pillars (G02F1/133377 takes precedence) · CPC title
Multilayer circuits · CPC title
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Frequently asked questions
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- What does patent US9237654B2 cover?
- An electronic component embedded substrate is disclosed. The electronic component embedded substrate in accordance with an embodiment of the present invention includes: a core substrate having a cavity formed therein; a plurality of electronic components embedded in the cavity and arranged in a predetermined format; and a plurality of dielectric spacers interposed in between the plurality of el…
- Who is the assignee on this patent?
- Samsung Electro Mech
- What technology area does this patent fall under?
- Primary CPC classification H05K1/185. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Jan 12 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).