Nonvolatile memory element, nonvolatile memory apparatus, nonvolatile semiconductor apparatus, and method of manufacturing nonvolatile memory element

Patent metadata

Field	Value
Publication number	US-9236381-B2
Application number	US-30703207-A
Country	US
Kind code	B2
Filing date	Oct 24, 2007
Priority date	Nov 17, 2006
Publication date	Jan 12, 2016
Grant date	Jan 12, 2016

Abstract

A nonvolatile memory element of the present invention comprises a first electrode ( 103 ), a second electrode ( 105 ), and a resistance variable layer ( 104 ) disposed between the first electrode ( 103 ) and the second electrode ( 104 ), a resistance value of the resistance variable layer varying reversibly according to an electric signal applied between the electrodes ( 103 ), ( 105 ), and the resistance variable layer ( 104 ) comprises at least a tantalum oxide, and is configured to satisfy 0<x<2.5 when the tantalum oxide is represented by TaOx.

First claim

The invention claimed is:

1. A nonvolatile memory apparatus comprising:
a memory cell including a first electrode, a second electrode, and a resistance variable layer disposed between the first electrode and the second electrode; and
a power supply driver circuit configured to apply a first voltage signal of positive polarity for a first data and a second voltage signal of negative polarity for a second data different from the first data, to the second electrode, the polarity being determined based on the voltage of the first electrode as a reference voltage, an absolute value of the first voltage signal being different from an absolute value of the second voltage signal,
wherein the resistance variable layer comprises at least a tantalum oxide that satisfies 0.8≦x≦1.9 when the tantalum oxide is represented by TaO x , a resistance value of the resistance variable layer varying reversibly according to the voltage signal applied by the power supply driver circuit.

2. The nonvolatile memory apparatus according to claim 1 , wherein at least one of the first electrode and the second electrode comprises at least one material selected from a group consisting of Pt, Ir, Cu, Au, Ag, TiN, and TiAlN.

3. A nonvolatile memory apparatus comprising:
a semiconductor substrate; and
a memory array including:
a plurality of first electrode wires formed on the semiconductor substrate to extend in parallel with each other;
a plurality of second electrode wires formed above the plurality of first electrode wires so as to extend in parallel with each other within a plane parallel to a main surface of the semiconductor substrate and so as to three-dimensionally cross the plurality of first electrode wires;

a power supply driver circuit configured to apply a first voltage signal of positive polarity for a first data and a second voltage signal of negative polarity for a second data different from the first data, through the second electrode wire, the polarity being determined based on the voltage applied through the first electrode wire as a reference voltage, and an absolute value of the first voltage signal being different from an absolute value of the second voltage signal; and
nonvolatile memory elements provided to respectively correspond to three-dimensional cross points of the plurality of first electrode wires and the plurality of second electrode wires,
wherein each of the nonvolatile memory elements includes a resistance variable layer disposed between an associated one of the first electrode wires and an associated one of the second electrode wires, comprising at least a tantalum oxide that satisfies 0.8≦x≦1.9 when the tantalum oxide is represented by TaO x , a resistance value of the resistance variable layer varying reversibly according to the voltage signal applied by the power supply driver circuit.

4. The nonvolatile memory apparatus according to claim 3 , wherein
each of the nonvolatile memory elements includes a first electrode connected to the first electrode wire, a second electrode connected to the second electrode wire, and the resistance variable layer disposed between the first electrode and the second electrode.

5. The nonvolatile memory apparatus according to claim 4 , wherein:
each of the nonvolatile memory elements includes a current restricting element provided between the first electrode and the second electrode, and
the current restricting element is electrically connected to the resistance variable layer.

6. The nonvolatile memory apparatus according to claim 3 , comprising a multi-layer memory array including a plurality of memory arrays stacked.

7. A nonvolatile memory apparatus comprising:
a semiconductor substrate; and
a plurality of word lines and a plurality of bit lines which are formed on the semiconductor substrate and are arranged to cross each other;
a plurality of transistors provided to respectively correspond to intersections of the plurality of word lines and the plurality of bit lines;
a plurality of nonvolatile memory elements provided to respectively correspond to the plurality of transistors, wherein:
each of the nonvolatile memory elements includes:
a first electrode;
a second electrode;
a power supply driver circuit configured to apply a first voltage signal of positive polarity for a first data to the second electrode, and a second voltage signal of negative polarity for a second data different from the first data, the polarity being determined based on the voltage of the first electrode as a reference voltage, and an absolute value of the first voltage signal being different from an absolute value of the second voltage signal; and
a resistance variable layer which is disposed between the first electrode and the second electrode, comprising at least a tantalum oxide that satisfies 0.8≦x≦1.9 when the tantalum oxide is represented by TaO x , a resistance value of the resistance variable layer varying reversibly according to the voltage signal applied by the power supply driver circuit.

8. A nonvolatile semiconductor apparatus comprising:
a semiconductor substrate;
a logic circuit formed on the semiconductor substrate, for executing predetermined calculation; and
a nonvolatile memory element formed on the semiconductor substrate and having a programming function, wherein:
the nonvolatile memory element includes:
a first electrode;
a second electrode;
a power supply driver circuit configured to apply a first voltage signal of positive polarity for a first data and a second voltage signal of negative polarity for a second data different from the first data, the polarity being determined based on the voltage of the first electrode as a reference voltage, and an absolute value of the first voltage signal being different from an absolute value of the second voltage signal; and
a resistance variable layer disposed between the first electrode and the second electrode, comprising at least a tantalum oxide that satisfies 0.8≦x≦1.9 when the tantalum oxide is represented by TaO x , a resistance value of the resistance variable layer varying reversibly according to the voltage signal applied by the power supply driver circuit.

9. The nonvolatile memory apparatus according to claim 3 , wherein at least one of the first electrode and the second electrode comprises at least one material selected from a group consisting of Pt, Ir, Cu, Au, Ag, TiN, and TiAlN.

10. The nonvolatile semiconductor apparatus according to claim 8 , wherein at least one of the first electrode and the second electrode comprises at least one material selected from a group consisting of Pt, Ir, Cu, Au, Ag, TiN, and TiAlN.

11. The nonvolatile memory apparatus according to claim 1 , wherein the power supply driver circuit is configured to apply a pulse voltage as the voltage signal.

12. A method of operating a nonvolatile memory apparatus, the nonvolatile memory apparatus comprising a memory cell including a first electrode, a second electrode, and a resistance variable layer disposed between the first electrode and the second electrode, the resistance variable layer comprising a tantalum oxide that satisfies 0.8≦x≦1.9 when the tantalum oxide is represented by TaO x , the method comprising steps of:
writing a first data into the memory cell by applying a first voltage signal of positive polarity to the second electrode; and
writing a second data into the memory cell by applying a second voltage signal of negative polarity to the second electrode, the second data being different from the first data, wherein:
the polarity is determined based on a voltage of the first electrode as a reference voltage, and
an absolute value of the first voltage signal is differe

Assignees

• Fujii Satoru
• Takagi Takeshi
• Muraoka Shunsaku
• Osano Koichi
• Shimakawa Kazuhiko
• Panasonic Ip Man Co Ltd

Inventors

• Fujii Satoru
• Takagi Takeshi
• Muraoka Shunsaku
• Osano Koichi
• Shimakawa Kazuhiko

Classifications

• H10D84/206

  of combinations of capacitors and resistors · CPC title

• G11C2213/32

  Material having simple binary metal oxide structure · CPC title

• G11C13/0007 Primary

  comprising metal oxide memory material, e.g. perovskites · CPC title

• H01L27/101 Primary

  Electricity · mapped topic

• H01L27/2418

  Electricity · mapped topic