Device comprising a fluid channel provided with at least one micro or nanoelectronic system and method for carrying out such a device

Patent metadata

Field	Value
Publication number	US-9234879-B2
Application number	US-201414335175-A
Country	US
Kind code	B2
Filing date	Jul 18, 2014
Priority date	Jul 22, 2013
Publication date	Jan 12, 2016
Grant date	Jan 12, 2016

Abstract

Device including a substrate including at least one microelectronic and/or nanoelectronic structure (NEMS) having a sensitive portion and a fluid channel. The fluid channel includes two lateral walls, an upper wall connecting the two lateral walls, a lower wall formed by the substrate, and at least two openings in order to provide a circulation in the fluid channel, with the openings being defined between the two lateral walls, with the structure being located inside the fluid channel. Electrical connection lines extend between the structure and the outside of the fluid channel, with the connection lines being carried out on the substrate and passing under the lateral walls. The device also includes an intermediate layer having a planar face in contact with base faces of said lateral walls. The connection lines are at least partially covered by the intermediate layer at least immediately above base faces of the lateral walls. The lateral walls are made sealingly integral on the substrate by a sealing layer on the intermediate layer.

First claim

The invention claimed is:

1. A device comprising:
a substrate comprising at least one microelectronic and/or nanoelectronic structure comprising at least one suspended portion,
a cover,
a fluid channel defined between said substrate and the cover, said fluid channel comprising two lateral walls and an upper wall connecting the two lateral walls formed by said cover and a lower wall formed by said substrate and at least two openings in order to provide a circulation in said channel, said microelectronic and/or nanoelectronic structure being located inside the fluid channel,
an intermediate layer comprising a face in contact with base faces of said lateral walls, said face of the intermediate layer having an aptitude for sealing with the base faces,
at least one electrical connection line extending between said microelectronic and/or nanoelectronic structure and the outside of the fluid channel, said connection line being carried out on the substrate and passing under one of the lateral walls, said at least one electrical connection line being at least partially covered by said intermediate layer at least immediately above the base face of said lateral wall, said lateral walls being sealingly fixed on said substrate by a sealing mechanism on said intermediate layer.

2. The device according to claim 1 , comprising a functionalization layer encapsulating at least one portion of the suspended portion of the microelectronic and/or nanoelectronic structure.

3. The device according to claim 2 , wherein the functionalization layer comprises one or several materials chosen from among organic or inorganic materials, polymers, oxides, semiconductors.

4. The device according to claim 1 , wherein the at least one electrical connection line comprises at least one pair of connection lines extending laterally on either side of the microelectronic and/or nanoelectronic structure and each passing under a lateral wall.

5. The device according to claim 1 , wherein the intermediate layer covers, in the fluid channel, the entire microelectronic and/or nanoelectronic structure except for its suspended portion.

6. The device according to claim 1 , wherein the intermediate layer comprises an electrical insulating material, such as silicon oxide, or a silicon nitride.

7. The device according to claim 1 , comprising electrical connection lines and contact pads, said contact pads being located outside of the fluid channel, said connection lines extending between the microelectronic and/or nanoelectronic structure and the contact pads.

8. The device according to claim 1 , wherein the electrical connection lines comprise several levels of metallisation at least inside the fluid channel.

9. The device according to claim 1 , comprising a dry film for sealing inserted between the intermediate layer and the base faces of the lateral walls of the cover.

10. The device according to claim 9 , wherein the dry film for sealing is structured into several beads on interfaces between the intermediate layer and the base faces of the lateral walls.

11. The device according to claim 1 , comprising at least one layer of material inserted between the intermediate layer and the base faces of the lateral walls creating a eutectic sealing or by thermo-compression, or by screen printing or wherein the sealing is a molecular sealing or wherein the sealing is made by glass frit.

12. The device according to claim 1 , wherein the intermediate layer comprises a first layer of electrical insulating material in contact with the electrical connection line and a second layer deposited onto the first layer, said second layer being of a material such that it is little or not sensitive to a step of releasing the microelectronic and/or nanoelectronic structure.

13. The device according to claim 12 , wherein the second layer is made of Si, silicon nitride, metal or hafnium oxide.

14. The device according to claim 1 , wherein the channel forms a gas chromatography microcolumn.

15. A method of carrying out at least one device according to claim 1 , comprising the steps of:
a) carrying out the microelectronic and/or nanoelectronic structure on a substrate and of at least one connection line,
b) forming of the intermediate layer is such a way that it has a substantially planar free face having an opening above said at least suspended portion
c) carrying out of a cover substrate comprising a fluid channel,
d) sealing of the cover substrate on the intermediate layer in such a way that the fluid channel is arranged facing the microelectronic and/or nanoelectronic structure.

16. The method according to claim 15 , comprising a step of carrying out a functionalization layer inside the fluid channel on the microelectronic and/or nanoelectronic structure and/or on the walls of the cover and/or on the intermediate layer, said step being carried out before the sealing.

17. The method of carrying out according to claim 15 , comprising after the step b), a step of releasing said microelectronic and/or nanoelectronic structure.

18. The method of carrying out according to claim 15 , wherein the step of sealing using a dry film, the method for carrying out comprises the sub-steps of:
rolling of dry film on the base faces of the walls of the cover,
structuring of the dry film,
coming closer together of the cover and of the substrate comprising the microelectronic and/or nanoelectronic structure,
application of a pressure in such a way as to crush the dry film.

19. The method of carrying out according to claim 15 , wherein the sealing is a eutectic sealing or by thermo-compression, or by molecular sealing or by screen printing.

20. The method of carrying out according to claim 15 , wherein the carrying out of the intermediate layer takes place by deposit of a first layer of electrical insulating material and of deposit of a second layer on the first layer.

21. The method of carrying out according to claim 15 , wherein several devices are carried out simultaneously, said substrate comprising several microelectronic and/or nanoelectronic structures and the cover substrate comprising several covers, with the covers being sealed simultaneously on the substrate comprising the microelectronic and/or nanoelectronic structures, in such a way that a fluid channel of a device can communicate or not with the fluid channel of other devices.

22. The method of carrying out according to claim 21 , comprising the steps of:
carrying out pre-cuts in a direction perpendicular to the fluid channels in the cover substrate and in the substrate bearing the microelectronic structures and/or
carrying out cuts or pre-cuts in a direction parallel to the fluid channels in the substrate bearing the microelectronic and/or nanoelectronic structures,
separating devices.

23. The method of carrying out according to claim 22 , wherein the separation of the devices is carried by cleavage.

24. The method of carrying out according to claim 22 , wherein the cover substrate comprising cavities formed beforehand between the channels wherein are located contact pads after sealing, the method further comprises a step of cutting the cover substrate in order to open said cavities.

25. The method of carrying out according to claim 23 , wherein the cover substrate comprising cavities formed beforehand between the channels wherein are located contact pads after sealing, the method further comprises a step of cutting the cover substrate i

Assignees

• Commissariat Energie Atomique
• Commissariat à l'énergie atomique et aux énergies alternatives

Inventors

• Ollier Eric
• Marcoux Carine

Classifications

• G01N30/64

  Electrical detectors · CPC title

• B81B2201/058

  Microfluidics not provided for in B81B2201/051 - B81B2201/054 · CPC title

• B81C2203/0172

  Seals · CPC title

• B81C1/00269

  Bonding of solid lids or wafers to the substrate · CPC title

• G01N30/6095 Primary

  Micromachined or nanomachined, e.g. micro- or nanosize · CPC title