Semiconductor storage device

Patent metadata

Field	Value
Publication number	US-9229863-B2
Application number	US-201213462905-A
Country	US
Kind code	B2
Filing date	May 3, 2012
Priority date	Dec 18, 2009
Publication date	Jan 5, 2016
Grant date	Jan 5, 2016

Abstract

According to the embodiments, a first storage area and a second storage area specified by a trim request is managed by a first management unit, and the second storage area specified by the trim request is managed by a second management unit. A block in which data of the first management unit are all specified by the trim request from the first or second storage areas and a block in which data of the second management unit are all specified by the trim request from the second storage area are released.

First claim

What is claimed is:

1. A semiconductor storage device comprising:
a first storage area that includes a plurality of blocks;
a second storage area that includes a plurality of blocks; and
a controller, the controller being configured to:
manage, by a first management unit, first data, the first data being stored in the first storage area, the first management unit being larger than a sector;
manage, by a second management unit, second data, the second data being stored in the second storage area, the second management unit being larger than the first management unit, and equal to or smaller than a block;
manage, by the first management unit, whether the first data is specified by a trim request;
manage, by the first management unit and the second management unit, whether the second data is specified by the trim request;
release a first block from the first storage area, the first block being filled with third data, the third data being the first data specified by the trim request, the third data being data managed by the first management unit;
release a second block from the second storage area, the second block being filled with fourth data, the fourth data being the second data specified by the trim request, the fourth data being data managed by the first management unit; and
release a third block from the second storage area, the third block being filled with fifth data, the fifth data being the second data specified by the trim request, the fifth data being data managed by the second management unit.

2. The semiconductor storage device according to claim 1 , wherein
the controller includes a first management table and a second management table, the first management table managing the third data and the fourth data by a logical address of the first management unit, the second management table managing the fifth data by a logical address of the second management unit.

3. The semiconductor storage device according to claim 2 , wherein
the controller is configured to:
release a first entry of the first management table, the first entry being an entry that manages the third data included in the first block or the fourth data included in the second block, and
release a second entry of the second management table, the second entry being an entry that manages the fifth data included in the third block.

4. The semiconductor storage device according to claim 2 , wherein, when a logical address range specified by the trim request is equal to or larger than the second management unit, the controller determines, based on the second management table, whether the fifth data is present in the second storage area, the fifth data having a logical address range included in the logical address range specified by the trim request.

5. The semiconductor storage device according to claim 4 , wherein, when the fifth data is registered in the second management table, the controller asserts a trim flag of an entry corresponding to the fifth data in the second management table.

6. The semiconductor storage device according to claim 5 , wherein the controller determines, based on the first management table, whether the third data is present in the first storage area, the third data having a logical address range included in the logical address range of the fifth data.

7. The semiconductor storage device according to claim 6 , wherein, when the third data is registered in the first management table, the controller asserts a trim flag of an entry corresponding to the third data in the first management table.

8. The semiconductor storage device according to claim 4 , wherein the controller is configured
when the logical address range specified by the trim request is smaller than the second management unit and equal to or larger than the first management unit, to determine, based on the first management table, whether the third data is present in the first storage area, and whether the fourth data is present in the second storage area, the third data having a logical address range included in the logical address range specified by the trim request, the fourth data having a logical address range included in the logical address range specified by the trim request, and
when the logical address range specified by the trim request is smaller than the first management unit, not to set the logical address range specified by the trim request as a trim target.

9. The semiconductor storage device according to claim 8 , wherein,
when the third data or the fourth data is registered in the first management table, the controller asserts a trim flag of an entry corresponding to the third data or the fourth data in the first management table.

10. The semiconductor storage device according to claim 1 , wherein the controller is configured to, when a capacity of the first storage area is saturated, consolidate a plurality of pieces of the first data of the first management unit stored in the first storage area into the second data of the second management unit and moves the consolidated data to the second storage area.

11. The semiconductor storage device according to claim 2 , wherein the controller is configured to, when a resource for generating an entry of the first management table is not sufficient in a nonvolatile semiconductor memory, consolidate a plurality of pieces of the first data of the first management unit stored in the first storage area into the second data of the second management unit and moves the consolidated data to the second storage area.

12. The semiconductor storage device according to claim 1 , wherein
the controller is configured to:
manage, by a sector unit, whether the first data is specified by the trim request,
manage, by the sector unit, whether the second data is specified by the trim request,
release a fourth block from the first storage area, the fourth block being filled with sixth data, the sixth data being the first data specified by the trim request, the sixth data being data managed by the sector unit, and
release a fifth block from the second storage area, the fifth block being filled with seventh data, the seventh data being the second data specified by the trim request, the seventh data being data managed by the sector unit.

13. The semiconductor storage device according to claim 12 , wherein the controller includes a third management table, the third management table managing the sixth data and the seventh data by a logical address of the sector unit.

14. The semiconductor storage device according to claim 13 , wherein
the controller releases a third entry of the third management table, the third entry managing the sixth data included in the fourth block or the seventh data included in the fifth block.

15. The semiconductor storage device according to claim 13 , wherein the controller is configured to, when a resource for generating an entry of the third management table is not sufficient in a nonvolatile semiconductor memory, consolidate a plurality of pieces of the first data of the first management unit stored in the first storage area into the second data of the second management unit and moves the consolidated data to the second storage area.

16. The semiconductor storage device according to claim 1 , further comprising
a cache memory coupled with the nonvolatile semiconductor memory, wherein
the controller is configured to perform:
a first flushing for flushing a plurality of pieces of data of a sector unit written in the cache memory to the first storage area as data of the first management unit; and
a second flushing for flushing a plurality of pieces of dat

Assignees

• Yoshihashi Eiji
• Yano Hirokuni
• Yonezawa Shinji
• Toshiba Kk

Inventors

• Yoshihashi Eiji
• Yano Hirokuni
• Yonezawa Shinji

Classifications

• G06F12/0804 Primary

  with main memory updating (G06F12/0806 takes precedence) · CPC title

• G06F12/0866

  for peripheral storage systems, e.g. disk cache · CPC title

• G06F2212/214

  Solid state disk · CPC title

• G06F2212/7205

  Cleaning, compaction, garbage collection, erase control · CPC title

• G06F2212/7201

  Logical to physical mapping or translation of blocks or pages · CPC title