Memory performance evaluation using address mapping information
US-2024394164-A1 · Nov 28, 2024 · US
US9213635B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9213635-B2 |
| Application number | US-201414275158-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 12, 2014 |
| Priority date | Mar 1, 2008 |
| Publication date | Dec 15, 2015 |
| Grant date | Dec 15, 2015 |
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A memory system according to an embodiment of the present invention comprises: speed of processing for searching through management tables is increased by providing a forward lookup table for searching for, respectively in track and cluster units, from a logical address, a storage device position where data corresponding to the logical address and a reverse lookup table for searching for, from a position of the storage device, a logical address stored in the position and linking these tables.
Opening claim text (preview).
The invention claimed is: 1. A method of controlling a memory system which includes a nonvolatile memory including a plurality of blocks, each of the plurality of blocks including a plurality of pages, the method comprising: managing a first information with a first management unit and a second management unit, the first information relating to a logical address, the second management unit being larger than a size of one page; and managing a second information with the first ma…
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