Memory device and driving method of the memory device

Patent metadata

Field	Value
Publication number	US-9224472-B2
Application number	US-201414505568-A
Country	US
Kind code	B2
Filing date	Oct 3, 2014
Priority date	Apr 13, 2011
Publication date	Dec 29, 2015
Grant date	Dec 29, 2015

Abstract

A memory device which can reduce power consumption and a driving method thereof are disclosed. In a memory element including an inverter and the like, a capacitor for holding data and a capacitor switching element for controlling store and release of charge in the capacitor are provided. The capacitor switching element is designed so that the off-state current is sufficiently low. Therefore, even when power supply of the inverter is stopped after charge corresponding to data is stored in the capacitor, data can be held for a long period of time. In order to return data, potentials of output and input terminals of the inverter are set to a precharge potential, then charge in the capacitor is released, and power is supplied to the inverter. A switching element for supplying the precharge potential may be provided.

First claim

What is claimed is:

1. An electronic device comprising:
a first data line;
a second data line; and
a memory cell comprising:
a first switching element;
a second switching element;
a third switching element;
a first inverter;
a second inverter; and
a first capacitor,

wherein an output of the first inverter is input to the second inverter without passing through any switching element,
wherein an output of the second inverter is input to the first inverter withou…

Assignees

• Semiconductor Energy Lab

Inventors

• Takemura Yasuhiko

Classifications

• G11C14/0054 Primary

  Physics · mapped topic

• G11C11/412 Primary

  Physics · mapped topic

• G11C11/409

  Physics · mapped topic

• G11C7/10 Primary

  Physics · mapped topic

• G11C5/14

  Physics · mapped topic