Integrated circuit including gate electrode conductive structures with different extension distances beyond contact
US-8946781-B2 · Feb 3, 2015 · US
Print compatible designs and layout schemes for printed electronics
US9155202B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9155202-B2 |
| Application number | US-201313757649-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 1, 2013 |
| Priority date | Aug 5, 2009 |
| Publication date | Oct 6, 2015 |
| Grant date | Oct 6, 2015 |
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- Title
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Abstract
Official abstract text for this publication.
Embodiments of the present invention relate to circuit layouts that are compatible with printing electronic inks, printed circuits formed by printing an electronic ink or a combination of printing and conventional blanket deposition and photolithography, and methods of forming circuits by printing electronic inks onto structures having print-compatible shapes. The layouts include features having (i) a print-compatible shape and (ii) an orientation that is either orthogonal or parallel to the orientation of every other feature in the layout.
First claim
Opening claim text (preview).
What is claimed is: 1. A layout for a printed circuit, comprising: a first layout consisting essentially of a first plurality of features, each of the first plurality of features being orthogonal or parallel to every other feature in the first plurality of features, the first plurality of features comprising (i) first print-compatible shape features and (ii) first and second subsets of features; and a second layout consisting essentially of a second plurality of features, each o…
Assignees
Inventors
Classifications
- H10W20/4473Primary
Electricity · mapped topic
- H05K1/0296Primary
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9155202B2 cover?
- Embodiments of the present invention relate to circuit layouts that are compatible with printing electronic inks, printed circuits formed by printing an electronic ink or a combination of printing and conventional blanket deposition and photolithography, and methods of forming circuits by printing electronic inks onto structures having print-compatible shapes. The layouts include features havin…
- Who is the assignee on this patent?
- Thin Film Electronics Asa
- What technology area does this patent fall under?
- Primary CPC classification H10W20/4473. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Oct 06 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).